Mark Kettenis [mark.kettenis@xs4all.nl] wrote:
> On amd64, we only have 240 interrupt vectors, which means they're a
> limited.  And unless I'm terribly confused, we're not using 48 of
> those because of the way we've assigned the priority levels.  And with
> more and more devices supporting multiple interrupt vectors, we can
> put these to good use.  So this diff rearranges the levels to make the
> additonal vectors available for use.  Since it most likely network
> devices that need these, I leave a gap between between IPL_NET and
> IPL_SOFTTTY.  That way, it will take longer for IPL_NET interrupts to
> spill over into the IPL_SOFTTTY range and mess up the interrupt
> priorities.

For amd64 boxes with lots of multi-queue network interfaces, we are
mapping interrupts to a particular CPU core. Is it possible to start
mapping to the interrupt descriptor table separately on each CPU, instead
of using the same global map?