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em(4) TSO support -- 2nd try
On Fri, Feb 16, 2024, at 3:53 PM, Alexander Bluhm wrote: > Tested on amd64 > > em0 at pci2 dev 0 function 0 "Intel 82576" rev 0x01: msi, address > 00:1b:21:da:f6:ec > em2 at pci3 dev 0 function 0 "Intel 82580" rev 0x01: msi, address > 90:e2:ba:78:7c:f0 > em4 at pci3 dev 0 function 2 "Intel 82580" rev 0x01: msi, address > 90:e2:ba:78:7c:f2 > em6 at pci4 dev 0 function 0 "Intel 82571EB" rev 0x06: apic 2 int 16, > address 00:1b:21:7b:d1:10 > em8 at pci5 dev 0 function 0 "Intel I350" rev 0x01: msi, address > 00:25:90:e7:ec:7c > em10 at pci10 dev 0 function 0 "Intel I350" rev 0x01: msi, address > a0:36:9f:04:fb:3c > em12 at pci10 dev 0 function 2 "Intel I350" rev 0x01: msi, address > a0:36:9f:04:fb:3e > em14 at pci11 dev 0 function 0 "Intel 82576" rev 0x01: msi, address > 00:1b:21:60:58:28 > em16 at pci15 dev 0 function 0 "Intel 82571EB" rev 0x06: apic 3 int 13, > address 00:50:c2:01:f4:60 > > Tested on amd64 with VLan > > em0 at pci7 dev 0 function 0 "Intel I350" rev 0x01: msi, address > a0:36:9f:0a:4a:c4 > em2 at pci8 dev 0 function 0 "Intel 82576" rev 0x01: msi, address > 00:1b:21:74:2d:d0 > em4 at pci17 dev 0 function 0 "Intel 82575EB" rev 0x02: msi, address > 00:19:99:ab:27:70 > > Tested on sparc64 > > em2 at pci7 dev 0 function 0 "Intel 82571EB" rev 0x06: ivec 0x14, > address 00:21:28:13:9c:0e > em4 at pci11 dev 0 function 0 "Intel 82580" rev 0x01: msi, address > 90:e2:ba:61:58:80 > em8 at pci18 dev 0 function 0 "Intel 82576" rev 0x01: msi, address > 90:e2:ba:d3:e4:6e > > OK bluhm@ Thank you mglocker@, bluhm@, Hrvoje, and anyone else that contributed for digging into this! I'm happy to have some of my lesser em(4) devices get a bit longer life. Brian
em(4) TSO support -- 2nd try