Download raw body.
Support for RTL8127 10Gb Ethernet controller
Hi,
This diff adds preliminary support for RTL8127 to rge(4) and identifies
the RTL8125 chipset variant.
Tested:
rge0 at pci5 dev 0 function 0 "Realtek RTL8127" rev 0x05: msix, address 1c:86:0b:xx:xx:xx
Test reports (if any) and OKs are welcome.
Index: share/man/man4/pci.4
===================================================================
RCS file: /cvs/src/share/man/man4/pci.4,v
diff -u -p -u -p -r1.412 pci.4
--- share/man/man4/pci.4 27 Apr 2025 07:53:12 -0000 1.412
+++ share/man/man4/pci.4 18 Sep 2025 01:46:22 -0000
@@ -261,7 +261,7 @@ AMD PCnet-PCI 10/100 Ethernet device
.It Xr re 4
Realtek 8139C+/8169/816xS/811xS/8168/810xE 10/100/1Gb Ethernet device
.It Xr rge 4
-Realtek 8125/8125B/8125D/8126 PCI Express 10/100/1Gb/2.5Gb/5Gb Ethernet device
+Realtek 8125/8126/8127 PCI Express 10/100/1Gb/2.5Gb/5Gb/10Gb Ethernet device
.It Xr rl 4
Realtek 8129/8139 10/100 Ethernet device
.It Xr se 4
Index: share/man/man4/rge.4
===================================================================
RCS file: /cvs/src/share/man/man4/rge.4,v
diff -u -p -u -p -r1.8 rge.4
--- share/man/man4/rge.4 14 Apr 2025 05:37:58 -0000 1.8
+++ share/man/man4/rge.4 18 Sep 2025 01:46:22 -0000
@@ -19,7 +19,7 @@
.Os
.Sh NAME
.Nm rge
-.Nd Realtek 8125/8125B/8125D/8126 PCI Express 10/100/1Gb/2.5Gb/5Gb \
+.Nd Realtek 8125/8126/8127 PCI Express 10/100/1Gb/2.5Gb/5Gb/10Gb
Ethernet device
.Sh SYNOPSIS
.Cd "rge* at pci?"
@@ -27,8 +27,8 @@ Ethernet device
The
.Nm
driver provides support for NICs based on the
-Realtek RTL8125, RTL8125B, RTL8125D and RTL8126 PCI Express Ethernet
-controllers, including the following:
+Realtek RTL8125, RTL8126 and RTL8127 PCI Express Ethernet controllers,
+including the following:
.Pp
.Bl -bullet -offset indent -compact
.It
@@ -41,10 +41,10 @@ Rivet Networks Killer E3000 Adapter (250
TP-LINK TL-NG421 Adapter (2500baseT)
.El
.Pp
-NICs based on the 8125, 8125B and 8125D are capable of 10, 100, 1000 and
-2500Mbps operation.
-NICs based on the 8126 are capable of 10, 100, 1000, 2500 and
+NICs based on the RTL8125 are capable of 10, 100, 1000 and 2500Mbps operation.
+NICs based on the RTL8126 are capable of 10, 100, 1000, 2500 and
5000Mbps operation.
+The RTL8127 supports 10Gbps speed.
.Pp
The
.Nm
Index: sys/dev/pci/if_rge.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_rge.c,v
diff -u -p -u -p -r1.37 if_rge.c
--- sys/dev/pci/if_rge.c 14 Apr 2025 05:37:58 -0000 1.37
+++ sys/dev/pci/if_rge.c 18 Sep 2025 01:46:23 -0000
@@ -79,15 +79,19 @@ void rge_tx_list_init(struct rge_queues
void rge_fill_rx_ring(struct rge_queues *);
int rge_rxeof(struct rge_queues *);
int rge_txeof(struct rge_queues *);
-void rge_reset(struct rge_softc *);
+int rge_reset(struct rge_softc *);
void rge_iff(struct rge_softc *);
-void rge_chipinit(struct rge_softc *);
+int rge_chipinit(struct rge_softc *);
void rge_set_phy_power(struct rge_softc *, int);
void rge_ephy_config(struct rge_softc *);
void rge_ephy_config_mac_r25(struct rge_softc *);
void rge_ephy_config_mac_r25b(struct rge_softc *);
+void rge_ephy_config_mac_r27(struct rge_softc *);
void rge_mac_config_mcu(struct rge_softc *, enum rge_mac_type);
+uint64_t rge_mcu_get_bin_version(uint16_t);
+void rge_mcu_set_version(struct rge_softc *, uint64_t);
int rge_phy_config(struct rge_softc *);
+void rge_phy_config_mac_r27(struct rge_softc *);
void rge_phy_config_mac_r26(struct rge_softc *);
void rge_phy_config_mac_r25(struct rge_softc *);
void rge_phy_config_mac_r25b(struct rge_softc *);
@@ -107,13 +111,15 @@ void rge_disable_sim_im(struct rge_soft
void rge_setup_sim_im(struct rge_softc *);
void rge_setup_intr(struct rge_softc *, int);
void rge_switch_mcu_ram_page(struct rge_softc *, int);
-void rge_exit_oob(struct rge_softc *);
+int rge_exit_oob(struct rge_softc *);
void rge_write_csi(struct rge_softc *, uint32_t, uint32_t);
uint32_t rge_read_csi(struct rge_softc *, uint32_t);
void rge_write_mac_ocp(struct rge_softc *, uint16_t, uint16_t);
uint16_t rge_read_mac_ocp(struct rge_softc *, uint16_t);
void rge_write_ephy(struct rge_softc *, uint16_t, uint16_t);
uint16_t rge_read_ephy(struct rge_softc *, uint16_t);
+uint16_t rge_check_ephy_ext_add(struct rge_softc *, uint16_t);
+void rge_r27_write_ephy(struct rge_softc *, uint16_t, uint16_t);
void rge_write_phy(struct rge_softc *, uint16_t, uint16_t, uint16_t);
uint16_t rge_read_phy(struct rge_softc *, uint16_t, uint16_t);
void rge_write_phy_ocp(struct rge_softc *, uint16_t, uint16_t);
@@ -155,7 +161,8 @@ struct cfdriver rge_cd = {
const struct pci_matchid rge_devices[] = {
{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_E3000 },
{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8125 },
- { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8126 }
+ { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8126 },
+ { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8127 }
};
int
@@ -245,12 +252,17 @@ rge_attach(struct device *parent, struct
break;
case 0x64100000:
sc->rge_type = MAC_R25B;
+ printf(": RTL8125B");
break;
case 0x64900000:
sc->rge_type = MAC_R26;
break;
case 0x68800000:
sc->rge_type = MAC_R25D;
+ printf(": RTL8125D");
+ break;
+ case 0x6c900000:
+ sc->rge_type = MAC_R27;
break;
default:
printf(": unknown version 0x%08x\n", hwrev);
@@ -273,7 +285,8 @@ rge_attach(struct device *parent, struct
reg);
}
- rge_chipinit(sc);
+ if (rge_chipinit(sc))
+ return;
rge_get_macaddr(sc, eaddr);
printf(", address %s\n", ether_sprintf(eaddr));
@@ -670,7 +683,8 @@ rge_init(struct ifnet *ifp)
rge_rx_list_init(q);
rge_tx_list_init(q);
- rge_chipinit(sc);
+ if (rge_chipinit(sc))
+ return;
if (rge_phy_config(sc))
return;
@@ -707,7 +721,7 @@ rge_init(struct ifnet *ifp)
val = rge_read_csi(sc, 0x70c) & ~0x3f000000;
rge_write_csi(sc, 0x70c, val | 0x27000000);
- if (sc->rge_type == MAC_R26) {
+ if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) {
/* Disable L1 timeout. */
val = rge_read_csi(sc, 0x890) & ~0x00000001;
rge_write_csi(sc, 0x890, val);
@@ -726,24 +740,32 @@ rge_init(struct ifnet *ifp)
RGE_MAC_SETBIT(sc, 0xeb58, 0x0001);
- if (sc->rge_type == MAC_R26)
+ if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) {
RGE_CLRBIT_1(sc, 0xd8, 0x02);
+ if (sc->rge_type == MAC_R27) {
+ RGE_CLRBIT_1(sc, 0x20e4, 0x04);
+ RGE_MAC_CLRBIT(sc, 0xe00c, 0x1000);
+ RGE_MAC_CLRBIT(sc, 0xc0c2, 0x0040);
+ }
+ }
- val = rge_read_mac_ocp(sc, 0xe614) & ~0x0700;
+ val = rge_read_mac_ocp(sc, 0xe614);
+ val &= (sc->rge_type == MAC_R27) ? ~0x0f00 : ~0x0700;
if (sc->rge_type == MAC_R25 || sc->rge_type == MAC_R25D)
rge_write_mac_ocp(sc, 0xe614, val | 0x0300);
else if (sc->rge_type == MAC_R25B)
rge_write_mac_ocp(sc, 0xe614, val | 0x0200);
+ else if (sc->rge_type == MAC_R26)
+ rge_write_mac_ocp(sc, 0xe614, val | 0x0300);
else
- rge_write_mac_ocp(sc, 0xe614, val | 0x0400);
+ rge_write_mac_ocp(sc, 0xe614, val | 0x0f00);
val = rge_read_mac_ocp(sc, 0xe63e) & ~0x0c00;
rge_write_mac_ocp(sc, 0xe63e, val |
((fls(sc->sc_nqueues) - 1) & 0x03) << 10);
- RGE_MAC_CLRBIT(sc, 0xe63e, 0x0030);
- if (sc->rge_type != MAC_R25B)
- RGE_MAC_SETBIT(sc, 0xe63e, 0x0020);
+ val = rge_read_mac_ocp(sc, 0xe63e) & ~0x0030;
+ rge_write_mac_ocp(sc, 0xe63e, val | 0x0020);
RGE_MAC_CLRBIT(sc, 0xc0b4, 0x0001);
RGE_MAC_SETBIT(sc, 0xc0b4, 0x0001);
@@ -786,19 +808,27 @@ rge_init(struct ifnet *ifp)
RGE_MAC_CLRBIT(sc, 0xe080, 0x0002);
}
- if (sc->rge_type == MAC_R26)
+ if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27)
RGE_MAC_CLRBIT(sc, 0xea1c, 0x0304);
else
RGE_MAC_CLRBIT(sc, 0xea1c, 0x0004);
+ /* Clear tcam entries. */
RGE_MAC_SETBIT(sc, 0xeb54, 0x0001);
DELAY(1);
RGE_MAC_CLRBIT(sc, 0xeb54, 0x0001);
RGE_CLRBIT_2(sc, 0x1880, 0x0030);
- /* Config interrupt type for RTL8125B/RTL8126. */
- if (sc->rge_type != MAC_R25)
+ if (sc->rge_type == MAC_R27) {
+ val = rge_read_mac_ocp(sc, 0xd40c) & ~0xe038;
+ rge_write_phy_ocp(sc, 0xd40c, val | 0x8020);
+ }
+
+ /* Config interrupt type. */
+ if (sc->rge_type == MAC_R27)
+ RGE_CLRBIT_1(sc, RGE_INT_CFG0, RGE_INT_CFG0_AVOID_MISS_INTR);
+ else if (sc->rge_type != MAC_R25)
RGE_CLRBIT_1(sc, RGE_INT_CFG0, RGE_INT_CFG0_EN);
/* Clear timer interrupts. */
@@ -808,14 +838,14 @@ rge_init(struct ifnet *ifp)
RGE_WRITE_4(sc, RGE_TIMERINT3, 0);
num_miti =
- (sc->rge_type == MAC_R25 || sc->rge_type == MAC_R25D) ? 64 : 32;
+ (sc->rge_type == MAC_R25B || sc->rge_type == MAC_R26) ? 32 : 64;
/* Clear interrupt moderation timer. */
for (i = 0; i < num_miti; i++)
RGE_WRITE_4(sc, RGE_INTMITI(i), 0);
- if (sc->rge_type == MAC_R25B) {
+ if (sc->rge_type == MAC_R26) {
RGE_CLRBIT_1(sc, RGE_INT_CFG0,
- RGE_INT_CFG0_TIMEOUT_BYPASS |
+ RGE_INT_CFG0_TIMEOUT_BYPASS | RGE_INT_CFG0_RDU_BYPASS_8126 |
RGE_INT_CFG0_MITIGATION_BYPASS);
RGE_WRITE_2(sc, RGE_INT_CFG1, 0);
}
@@ -838,6 +868,7 @@ rge_init(struct ifnet *ifp)
RGE_SETBIT_4(sc, RGE_RXCFG, RGE_RXCFG_VLANSTRIP);
RGE_SETBIT_2(sc, RGE_CPLUSCMD, RGE_CPLUSCMD_RXCSUM);
+ RGE_READ_2(sc, RGE_CPLUSCMD);
/* Set Maximum frame size. */
RGE_WRITE_2(sc, RGE_RXMAXSIZE, RGE_JUMBO_FRAMELEN);
@@ -849,6 +880,9 @@ rge_init(struct ifnet *ifp)
/* Program promiscuous mode and multicast filters. */
rge_iff(sc);
+ if (sc->rge_type == MAC_R27)
+ RGE_CLRBIT_1(sc, RGE_RADMFIFO_PROTECT, 0x2001);
+
rge_disable_aspm_clkreq(sc);
RGE_CLRBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG);
@@ -939,21 +973,36 @@ rge_ifmedia_upd(struct ifnet *ifp)
/* Disable Gigabit Lite. */
RGE_PHY_CLRBIT(sc, 0xa428, 0x0200);
RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0001);
- if (sc->rge_type == MAC_R26)
- RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0002);
+ if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27)
+ RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0007);
val = rge_read_phy_ocp(sc, 0xa5d4);
- val &= ~RGE_ADV_2500TFDX;
- if (sc->rge_type == MAC_R26)
+ switch (sc->rge_type) {
+ case MAC_R27:
+ val &= ~RGE_ADV_10000TFDX;
+ /* fallthrough */
+ case MAC_R26:
val &= ~RGE_ADV_5000TFDX;
+ /* fallthrough */
+ default:
+ val &= ~RGE_ADV_2500TFDX;
+ break;
+ }
anar = ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
gig = GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
switch (IFM_SUBTYPE(ifm->ifm_media)) {
case IFM_AUTO:
- val |= (sc->rge_type != MAC_R26) ?
- RGE_ADV_2500TFDX : (RGE_ADV_2500TFDX | RGE_ADV_5000TFDX);
+ val |= RGE_ADV_2500TFDX;
+ if (sc->rge_type == MAC_R26)
+ val |= RGE_ADV_5000TFDX;
+ else if (sc->rge_type == MAC_R27)
+ val |= RGE_ADV_5000TFDX | RGE_ADV_10000TFDX;
+ break;
+ case IFM_10G_T:
+ val |= RGE_ADV_10000TFDX;
+ ifp->if_baudrate = IF_Gbps(10);
break;
case IFM_5000_T:
val |= RGE_ADV_5000TFDX;
@@ -1012,7 +1061,8 @@ rge_ifmedia_sts(struct ifnet *ifp, struc
status = RGE_READ_2(sc, RGE_PHYSTAT);
if ((status & RGE_PHYSTAT_FDX) ||
- (status & (RGE_PHYSTAT_2500MBPS | RGE_PHYSTAT_5000MBPS)))
+ (status & (RGE_PHYSTAT_1000MBPS | RGE_PHYSTAT_2500MBPS |
+ RGE_PHYSTAT_5000MBPS | RGE_PHYSTAT_10000MBPS)))
ifmr->ifm_active |= IFM_FDX;
else
ifmr->ifm_active |= IFM_HDX;
@@ -1027,6 +1077,10 @@ rge_ifmedia_sts(struct ifnet *ifp, struc
ifmr->ifm_active |= IFM_2500_T;
else if (status & RGE_PHYSTAT_5000MBPS)
ifmr->ifm_active |= IFM_5000_T;
+ else if (status & RGE_PHYSTAT_5000MBPS)
+ ifmr->ifm_active |= IFM_5000_T;
+ else if (status & RGE_PHYSTAT_10000MBPS)
+ ifmr->ifm_active |= IFM_10G_T;
}
}
@@ -1457,7 +1511,7 @@ rge_txeof(struct rge_queues *q)
return (1);
}
-void
+int
rge_reset(struct rge_softc *sc)
{
int i;
@@ -1476,6 +1530,11 @@ rge_reset(struct rge_softc *sc)
if (!(RGE_READ_1(sc, RGE_CMD) & RGE_CMD_STOPREQ))
break;
}
+ if (i == 20) {
+ printf("%s: failed to stop all requests\n",
+ sc->sc_dev.dv_xname);
+ return ETIMEDOUT;
+ }
} else
DELAY(200);
@@ -1495,7 +1554,7 @@ rge_reset(struct rge_softc *sc)
}
RGE_WRITE_1(sc, RGE_CMD,
- RGE_READ_1(sc, RGE_CMD) & RGE_CMD_TXENB | RGE_CMD_RXENB);
+ RGE_READ_1(sc, RGE_CMD) & (RGE_CMD_TXENB | RGE_CMD_RXENB));
/* Soft reset. */
RGE_WRITE_1(sc, RGE_CMD, RGE_CMD_RESET);
@@ -1505,8 +1564,12 @@ rge_reset(struct rge_softc *sc)
if (!(RGE_READ_1(sc, RGE_CMD) & RGE_CMD_RESET))
break;
}
- if (i == RGE_TIMEOUT)
+ if (i == RGE_TIMEOUT) {
printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
+ return ETIMEDOUT;
+ }
+
+ return 0;
}
void
@@ -1560,13 +1623,18 @@ rge_iff(struct rge_softc *sc)
RGE_WRITE_4(sc, RGE_MAR4, swap32(hashes[0]));
}
-void
+int
rge_chipinit(struct rge_softc *sc)
{
- rge_exit_oob(sc);
+ int error;
+
+ if ((error = rge_exit_oob(sc)) != 0)
+ return error;
rge_set_phy_power(sc, 1);
rge_hw_init(sc);
rge_hw_reset(sc);
+
+ return 0;
}
void
@@ -1594,6 +1662,7 @@ rge_set_phy_power(struct rge_softc *sc,
void
rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type)
{
+ uint64_t mcodever;
uint16_t reg;
int i, npages;
@@ -1674,7 +1743,65 @@ rge_mac_config_mcu(struct rge_softc *sc,
rge_write_mac_ocp(sc, 0xfc26, 0x8000);
rge_write_mac_ocp(sc, 0xfc28, 0x14a2);
rge_write_mac_ocp(sc, 0xfc48, 0x0001);
+ } else if (type == MAC_R27) {
+ mcodever = rge_mcu_get_bin_version(nitems(rtl8127_mac_bps));
+ if (sc->rge_mcodever != mcodever) {
+ /* Switch to page 0. */
+ rge_switch_mcu_ram_page(sc, 0);
+ for (i = 0; i < 256; i++)
+ rge_write_mac_ocp(sc, rtl8127_mac_bps[i].reg,
+ rtl8127_mac_bps[i].val);
+ /* Switch to page 1. */
+ rge_switch_mcu_ram_page(sc, 1);
+ for (; i < nitems(rtl8127_mac_bps); i++)
+ rge_write_mac_ocp(sc, rtl8127_mac_bps[i].reg,
+ rtl8127_mac_bps[i].val);
+ }
+ rge_write_mac_ocp(sc, 0xfc26, 0x8000);
+ rge_write_mac_ocp(sc, 0xfc28, 0x1520);
+ rge_write_mac_ocp(sc, 0xfc2a, 0x41e0);
+ rge_write_mac_ocp(sc, 0xfc2c, 0x508c);
+ rge_write_mac_ocp(sc, 0xfc2e, 0x50f6);
+ rge_write_mac_ocp(sc, 0xfc30, 0x34fa);
+ rge_write_mac_ocp(sc, 0xfc32, 0x0166);
+ rge_write_mac_ocp(sc, 0xfc34, 0x1a6a);
+ rge_write_mac_ocp(sc, 0xfc36, 0x1a2c);
+ rge_write_mac_ocp(sc, 0xfc48, 0x00ff);
+
+ /* Write microcode version. */
+ rge_mcu_set_version(sc, mcodever);
+ }
+}
+
+uint64_t
+rge_mcu_get_bin_version(uint16_t entries)
+{
+ uint64_t binver = 0;
+ int i;
+
+ for (i = 0; i < 4; i++) {
+ binver <<= 16;
+ binver |= rtl8127_mac_bps[entries - 4 + i].val;
+ }
+
+ return binver;
+}
+
+void
+rge_mcu_set_version(struct rge_softc *sc, uint64_t mcodever)
+{
+ int i;
+
+ /* Switch to page 2. */
+ rge_switch_mcu_ram_page(sc, 2);
+
+ for (i = 0; i < 8; i += 2) {
+ rge_write_mac_ocp(sc, 0xf9f8 + 6 - i, (uint16_t)mcodever);
+ mcodever >>= 16;
}
+
+ /* Switch back to page 0. */
+ rge_switch_mcu_ram_page(sc, 0);
}
void
@@ -1687,6 +1814,9 @@ rge_ephy_config(struct rge_softc *sc)
case MAC_R25B:
rge_ephy_config_mac_r25b(sc);
break;
+ case MAC_R27:
+ rge_ephy_config_mac_r27(sc);
+ break;
default:
break; /* Nothing to do. */
}
@@ -1726,9 +1856,23 @@ rge_ephy_config_mac_r25b(struct rge_soft
rge_write_ephy(sc, mac_r25b_ephy[i].reg, mac_r25b_ephy[i].val);
}
+void
+rge_ephy_config_mac_r27(struct rge_softc *sc)
+{
+ int i;
+
+ for (i = 0; i < nitems(mac_r27_ephy); i++)
+ rge_r27_write_ephy(sc, mac_r27_ephy[i].reg,
+ mac_r27_ephy[i].val);
+
+ /* Clear extended address. */
+ rge_write_ephy(sc, RGE_EPHYAR_EXT_ADDR, 0);
+}
+
int
rge_phy_config(struct rge_softc *sc)
{
+ uint16_t val = 0;
int i;
rge_ephy_config(sc);
@@ -1740,10 +1884,18 @@ rge_phy_config(struct rge_softc *sc)
rge_write_phy(sc, 0, MII_100T2CR,
rge_read_phy(sc, 0, MII_100T2CR) &
~(GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX));
- if (sc->rge_type == MAC_R26)
- RGE_PHY_CLRBIT(sc, 0xa5d4, RGE_ADV_2500TFDX | RGE_ADV_5000TFDX);
- else
- RGE_PHY_CLRBIT(sc, 0xa5d4, RGE_ADV_2500TFDX);
+ switch (sc->rge_type) {
+ case MAC_R27:
+ val |= RGE_ADV_10000TFDX;
+ /* fallthrough */
+ case MAC_R26:
+ val |= RGE_ADV_5000TFDX;
+ /* fallthrough */
+ default:
+ val |= RGE_ADV_2500TFDX;
+ break;
+ }
+ RGE_PHY_CLRBIT(sc, 0xa5d4, val);
rge_write_phy(sc, 0, MII_BMCR, BMCR_RESET | BMCR_AUTOEN |
BMCR_STARTNEG);
for (i = 0; i < 2500; i++) {
@@ -1756,14 +1908,11 @@ rge_phy_config(struct rge_softc *sc)
return (ETIMEDOUT);
}
- /* Read microcode version. */
+ /* Read ram code version. */
rge_write_phy_ocp(sc, 0xa436, 0x801e);
- sc->rge_mcodever = rge_read_phy_ocp(sc, 0xa438);
+ sc->rge_rcodever = rge_read_phy_ocp(sc, 0xa438);
switch (sc->rge_type) {
- case MAC_R26:
- rge_phy_config_mac_r26(sc);
- break;
case MAC_R25:
rge_phy_config_mac_r25(sc);
break;
@@ -1773,6 +1922,12 @@ rge_phy_config(struct rge_softc *sc)
case MAC_R25D:
rge_phy_config_mac_r25d(sc);
break;
+ case MAC_R26:
+ rge_phy_config_mac_r26(sc);
+ break;
+ case MAC_R27:
+ rge_phy_config_mac_r27(sc);
+ break;
default:
break; /* Can't happen. */
}
@@ -1787,9 +1942,9 @@ rge_phy_config(struct rge_softc *sc)
} else if (sc->rge_type == MAC_R25B || sc->rge_type == MAC_R25D)
RGE_PHY_SETBIT(sc, 0xa432, 0x0010);
- RGE_PHY_CLRBIT(sc, 0xa5d0, 0x0006);
+ RGE_PHY_CLRBIT(sc, 0xa5d0, (sc->rge_type == MAC_R27) ? 0x000e : 0x0006);
RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0001);
- if (sc->rge_type == MAC_R26)
+ if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27)
RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0002);
RGE_PHY_CLRBIT(sc, 0xa6d8, 0x0010);
RGE_PHY_CLRBIT(sc, 0xa428, 0x0080);
@@ -1804,6 +1959,276 @@ rge_phy_config(struct rge_softc *sc)
}
void
+rge_phy_config_mac_r27(struct rge_softc *sc)
+{
+ uint16_t val;
+ int i;
+ static const uint16_t mac_cfg_value[] =
+ { 0x815a, 0x0150, 0x81f4, 0x0150, 0x828e, 0x0150, 0x81b1, 0x0000,
+ 0x824b, 0x0000, 0x82e5, 0x0000 };
+
+ static const uint16_t mac_cfg2_value[] =
+ { 0x88d7, 0x01a0, 0x88d9, 0x01a0, 0x8ffa, 0x002a, 0x8fee, 0xffdf,
+ 0x8ff0, 0xffff, 0x8ff2, 0x0a4a, 0x8ff4, 0xaa5a, 0x8ff6, 0x0a4a,
+ 0x8ff8, 0xaa5a };
+
+ static const uint16_t mac_cfg_a438_value[] =
+ { 0x003b, 0x0086, 0x00b7, 0x00db, 0x00fe, 0x00fe, 0x00fe, 0x00fe,
+ 0x00c3, 0x0078, 0x0047, 0x0023 };
+
+ rge_phy_config_mcu(sc, RGE_MAC_R27_RCODE_VER);
+
+ rge_write_phy_ocp(sc, 0xa4d2, 0x0000);
+ rge_read_phy_ocp(sc, 0xa4d4);
+
+ RGE_PHY_CLRBIT(sc, 0xa442, 0x0800);
+ rge_write_phy_ocp(sc, 0xa436, 0x8415);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x9300);
+ rge_write_phy_ocp(sc, 0xa436, 0x81a3);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x0f00);
+ rge_write_phy_ocp(sc, 0xa436, 0x81ae);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x0f00);
+ rge_write_phy_ocp(sc, 0xa436, 0x81b9);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0xb900);
+ rge_write_phy_ocp(sc, 0xb87c, 0x83b0);
+ RGE_PHY_CLRBIT(sc,0xb87e, 0x0e00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x83c5);
+ RGE_PHY_CLRBIT(sc, 0xb87e, 0x0e00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x83da);
+ RGE_PHY_CLRBIT(sc, 0xb87e, 0x0e00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x83ef);
+ RGE_PHY_CLRBIT(sc, 0xb87e, 0x0e00);
+ val = rge_read_phy_ocp(sc, 0xbf38) & ~0x01f0;
+ rge_write_phy_ocp(sc, 0xbf38, val | 0x0160);
+ val = rge_read_phy_ocp(sc, 0xbf3a) & ~0x001f;
+ rge_write_phy_ocp(sc, 0xbf3a, val | 0x0014);
+ RGE_PHY_CLRBIT(sc, 0xbf28, 0x6000);
+ RGE_PHY_CLRBIT(sc, 0xbf2c, 0xc000);
+ val = rge_read_phy_ocp(sc, 0xbf28) & ~0x1fff;
+ rge_write_phy_ocp(sc, 0xbf28, val | 0x0187);
+ val = rge_read_phy_ocp(sc, 0xbf2a) & ~0x003f;
+ rge_write_phy_ocp(sc, 0xbf2a, val | 0x0003);
+ rge_write_phy_ocp(sc, 0xa436, 0x8173);
+ rge_write_phy_ocp(sc, 0xa438, 0x8620);
+ rge_write_phy_ocp(sc, 0xa436, 0x8175);
+ rge_write_phy_ocp(sc, 0xa438, 0x8671);
+ rge_write_phy_ocp(sc, 0xa436, 0x817c);
+ RGE_PHY_SETBIT(sc, 0xa438, 0x2000);
+ rge_write_phy_ocp(sc, 0xa436, 0x8187);
+ RGE_PHY_SETBIT(sc, 0xa438, 0x2000);
+ rge_write_phy_ocp(sc, 0xA436, 0x8192);
+ RGE_PHY_SETBIT(sc, 0xA438, 0x2000);
+ rge_write_phy_ocp(sc, 0xA436, 0x819D);
+ RGE_PHY_SETBIT(sc, 0xA438, 0x2000);
+ rge_write_phy_ocp(sc, 0xA436, 0x81A8);
+ RGE_PHY_CLRBIT(sc, 0xA438, 0x2000);
+ rge_write_phy_ocp(sc, 0xA436, 0x81B3);
+ RGE_PHY_CLRBIT(sc, 0xA438, 0x2000);
+ rge_write_phy_ocp(sc, 0xA436, 0x81BE);
+ RGE_PHY_SETBIT(sc, 0xA438, 0x2000);
+ rge_write_phy_ocp(sc, 0xa436, 0x817d);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
+ rge_write_phy_ocp(sc, 0xa436, 0x8188);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
+ rge_write_phy_ocp(sc, 0xa436, 0x8193);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
+ rge_write_phy_ocp(sc, 0xa436, 0x819e);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
+ rge_write_phy_ocp(sc, 0xa436, 0x81a9);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1400);
+ rge_write_phy_ocp(sc, 0xa436, 0x81b4);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1400);
+ rge_write_phy_ocp(sc, 0xa436, 0x81bf);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0xa600);
+ RGE_PHY_CLRBIT(sc, 0xaeaa, 0x0028);
+ rge_write_phy_ocp(sc, 0xb87c, 0x84f0);
+ rge_write_phy_ocp(sc, 0xb87e, 0x201c);
+ rge_write_phy_ocp(sc, 0xb87c, 0x84f2);
+ rge_write_phy_ocp(sc, 0xb87e, 0x3117);
+ rge_write_phy_ocp(sc, 0xaec6, 0x0000);
+ rge_write_phy_ocp(sc, 0xae20, 0xffff);
+ rge_write_phy_ocp(sc, 0xaece, 0xffff);
+ rge_write_phy_ocp(sc, 0xaed2, 0xffff);
+ rge_write_phy_ocp(sc, 0xaec8, 0x0000);
+ RGE_PHY_CLRBIT(sc, 0xaed0, 0x0001);
+ rge_write_phy_ocp(sc, 0xadb8, 0x0150);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8197);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8231);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x82cb);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x5000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x82cd);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8233);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8199);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x5700);
+ for (i = 0; i < nitems(mac_cfg_value); i+=2) {
+ rge_write_phy_ocp(sc, 0xb87c, mac_cfg_value[i]);
+ rge_write_phy_ocp(sc, 0xb87e, mac_cfg_value[i + 1]);
+ }
+ rge_write_phy_ocp(sc, 0xb87c, 0x84f7);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x2800);
+ RGE_PHY_SETBIT(sc, 0xaec2, 0x1000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x81b3);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x824d);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x82e7);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0xad00);
+ val = rge_read_phy_ocp(sc, 0xae4e) & ~0x000f;
+ rge_write_phy_ocp(sc, 0xae4e, val | 0x0001);
+ rge_write_phy_ocp(sc, 0xb87c, 0x82ce);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xf000;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x4000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x84ac);
+ rge_write_phy_ocp(sc, 0xb87e, 0x0000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x84ae);
+ rge_write_phy_ocp(sc, 0xb87e, 0x0000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x84b0);
+ rge_write_phy_ocp(sc, 0xb87e, 0xf818);
+ rge_write_phy_ocp(sc, 0xb87c, 0x84b2);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x6000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8ffc);
+ rge_write_phy_ocp(sc, 0xb87e, 0x6008);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8ffe);
+ rge_write_phy_ocp(sc, 0xb87e, 0xf450);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8015);
+ RGE_PHY_SETBIT(sc, 0xb87e, 0x0200);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8016);
+ RGE_PHY_CLRBIT(sc, 0xb87e, 0x0800);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8fe6);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x0800);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8fe4);
+ rge_write_phy_ocp(sc, 0xb87e, 0x2114);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8647);
+ rge_write_phy_ocp(sc, 0xb87e, 0xa7B1);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8649);
+ rge_write_phy_ocp(sc, 0xb87e, 0xbbca);
+ rge_write_phy_ocp(sc, 0xb87c, 0x864b);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0xdc00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8154);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xc000;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x4000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8158);
+ RGE_PHY_CLRBIT(sc, 0xb87e, 0xc000);
+ rge_write_phy_ocp(sc, 0xb87c, 0x826c);
+ rge_write_phy_ocp(sc, 0xb87e, 0xffff);
+ rge_write_phy_ocp(sc, 0xb87c, 0x826e);
+ rge_write_phy_ocp(sc, 0xb87e, 0xffff);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8872);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x0e00);
+ rge_write_phy_ocp(sc, 0xa436, 0x8012);
+ RGE_PHY_SETBIT(sc, 0xa438, 0x0800);
+ rge_write_phy_ocp(sc, 0xa436, 0x8012);
+ RGE_PHY_SETBIT(sc, 0xa438, 0x4000);
+ RGE_PHY_SETBIT(sc, 0xb576, 0x0001);
+ rge_write_phy_ocp(sc, 0xa436, 0x834a);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x0700);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8217);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0x3f00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x2a00);
+ rge_write_phy_ocp(sc, 0xa436, 0x81b1);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x0b00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x8fed);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x4e00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x88ac);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x2300);
+ RGE_PHY_SETBIT(sc, 0xbf0c, 0x3800);
+ rge_write_phy_ocp(sc, 0xb87c, 0x88de);
+ RGE_PHY_CLRBIT(sc, 0xb87e, 0xFF00);
+ rge_write_phy_ocp(sc, 0xb87c, 0x80B4);
+ rge_write_phy_ocp(sc, 0xb87e, 0x5195);
+ rge_write_phy_ocp(sc, 0xa436, 0x8370);
+ rge_write_phy_ocp(sc, 0xa438, 0x8671);
+ rge_write_phy_ocp(sc, 0xa436, 0x8372);
+ rge_write_phy_ocp(sc, 0xa438, 0x86c8);
+ rge_write_phy_ocp(sc, 0xa436, 0x8401);
+ rge_write_phy_ocp(sc, 0xa438, 0x86c8);
+ rge_write_phy_ocp(sc, 0xa436, 0x8403);
+ rge_write_phy_ocp(sc, 0xa438, 0x86da);
+ rge_write_phy_ocp(sc, 0xa436, 0x8406);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x8408);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x840a);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x840c);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x840e);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x8410);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x8412);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x8414);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x8416);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0x1800;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1000);
+ rge_write_phy_ocp(sc, 0xa436, 0x82bd);
+ rge_write_phy_ocp(sc, 0xa438, 0x1f40);
+ val = rge_read_phy_ocp(sc, 0xbfb4) & ~0x07ff;
+ rge_write_phy_ocp(sc, 0xbfb4, val | 0x0328);
+ rge_write_phy_ocp(sc, 0xbfb6, 0x3e14);
+ rge_write_phy_ocp(sc, 0xa436, 0x81c4);
+ for (i = 0; i < nitems(mac_cfg_a438_value); i++)
+ rge_write_phy_ocp(sc, 0xa438, mac_cfg_a438_value[i]);
+ for (i = 0; i < nitems(mac_cfg2_value); i+=2) {
+ rge_write_phy_ocp(sc, 0xb87c, mac_cfg2_value[i]);
+ rge_write_phy_ocp(sc, 0xb87e, mac_cfg2_value[i + 1]);
+ }
+ rge_write_phy_ocp(sc, 0xb87c, 0x88d5);
+ val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xb87e, val | 0x0200);
+ rge_write_phy_ocp(sc, 0xa436, 0x84bb);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x0a00);
+ rge_write_phy_ocp(sc, 0xa436, 0x84c0);
+ val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00;
+ rge_write_phy_ocp(sc, 0xa438, val | 0x1600);
+ RGE_PHY_SETBIT(sc, 0xa430, 0x0003);
+}
+
+void
rge_phy_config_mac_r26(struct rge_softc *sc)
{
uint16_t val;
@@ -1821,7 +2246,7 @@ rge_phy_config_mac_r26(struct rge_softc
0x0054, 0x0322, 0x00dd, 0x03ab, 0x03dc, 0x0027, 0x000e,
0x03e5, 0x03f9, 0x0012, 0x0001, 0x03f1 };
- rge_phy_config_mcu(sc, RGE_MAC_R26_MCODE_VER);
+ rge_phy_config_mcu(sc, RGE_MAC_R26_RCODE_VER);
RGE_PHY_SETBIT(sc, 0xa442, 0x0800);
rge_write_phy_ocp(sc, 0xa436, 0x80bf);
@@ -2100,7 +2525,7 @@ rge_phy_config_mac_r25(struct rge_softc
0xc022, 0x175a, 0xc024, 0x19c0, 0xc026, 0x1c26, 0xc089, 0x6050,
0xc08a, 0x5f6e, 0xc08c, 0x6e6e, 0xc08e, 0x6e6e, 0xc090, 0x6e12 };
- rge_phy_config_mcu(sc, RGE_MAC_R25_MCODE_VER);
+ rge_phy_config_mcu(sc, RGE_MAC_R25_RCODE_VER);
RGE_PHY_SETBIT(sc, 0xad4e, 0x0010);
val = rge_read_phy_ocp(sc, 0xad16) & ~0x03ff;
@@ -2173,7 +2598,7 @@ rge_phy_config_mac_r25b(struct rge_softc
uint16_t val;
int i;
- rge_phy_config_mcu(sc, RGE_MAC_R25B_MCODE_VER);
+ rge_phy_config_mcu(sc, RGE_MAC_R25B_RCODE_VER);
RGE_PHY_SETBIT(sc, 0xa442, 0x0800);
val = rge_read_phy_ocp(sc, 0xac46) & ~0x00f0;
@@ -2210,7 +2635,7 @@ rge_phy_config_mac_r25d(struct rge_softc
uint16_t val;
int i;
- rge_phy_config_mcu(sc, RGE_MAC_R25D_MCODE_VER);
+ rge_phy_config_mcu(sc, RGE_MAC_R25D_RCODE_VER);
RGE_PHY_SETBIT(sc, 0xa442, 0x0800);
@@ -2398,9 +2823,9 @@ rge_phy_config_mac_r25d(struct rge_softc
}
void
-rge_phy_config_mcu(struct rge_softc *sc, uint16_t mcode_version)
+rge_phy_config_mcu(struct rge_softc *sc, uint16_t rcodever)
{
- if (sc->rge_mcodever != mcode_version) {
+ if (sc->rge_rcodever != rcodever) {
int i;
rge_patch_phy_mcu(sc, 1);
@@ -2448,13 +2873,23 @@ rge_phy_config_mcu(struct rge_softc *sc,
for (i = 0; i < nitems(mac_r26_mcu); i++)
rge_write_phy_ocp(sc,
mac_r26_mcu[i].reg, mac_r26_mcu[i].val);
+ } else if (sc->rge_type == MAC_R27) {
+ for (i = 0; i < 1887; i++)
+ rge_write_phy_ocp(sc,
+ mac_r27_mcu[i].reg, mac_r27_mcu[i].val);
+ rge_patch_phy_mcu(sc, 0);
+
+ rge_patch_phy_mcu(sc, 1);
+ for (; i < nitems(mac_r27_mcu); i++)
+ rge_write_phy_ocp(sc,
+ mac_r27_mcu[i].reg, mac_r27_mcu[i].val);
}
rge_patch_phy_mcu(sc, 0);
- /* Write microcode version. */
+ /* Write ram code version. */
rge_write_phy_ocp(sc, 0xa436, 0x801e);
- rge_write_phy_ocp(sc, 0xa438, mcode_version);
+ rge_write_phy_ocp(sc, 0xa438, rcodever);
}
}
@@ -2487,6 +2922,7 @@ void
rge_hw_init(struct rge_softc *sc)
{
uint16_t reg;
+ int i;
rge_disable_aspm_clkreq(sc);
RGE_CLRBIT_1(sc, 0xf1, 0x80);
@@ -2502,6 +2938,15 @@ rge_hw_init(struct rge_softc *sc)
DELAY(3000);
rge_write_mac_ocp(sc, 0xfc26, 0);
+ /* Read microcode version. */
+ rge_switch_mcu_ram_page(sc, 2);
+ sc->rge_mcodever = 0;
+ for (i = 0; i < 8; i += 2) {
+ sc->rge_mcodever <<= 16;
+ sc->rge_mcodever |= rge_read_mac_ocp(sc, 0xf9f8 + i);
+ }
+ rge_switch_mcu_ram_page(sc, 0);
+
rge_mac_config_mcu(sc, sc->rge_type);
/* Disable PHY power saving. */
@@ -2581,6 +3026,10 @@ rge_add_media_types(struct rge_softc *sc
ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T, 0, NULL);
ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T | IFM_FDX,
0, NULL);
+ } else if (sc->rge_type == MAC_R27) {
+ ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_10G_T, 0, NULL);
+ ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_10G_T | IFM_FDX,
+ 0, NULL);
}
}
@@ -2611,7 +3060,7 @@ rge_disable_aspm_clkreq(struct rge_softc
if (unlock)
RGE_SETBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG);
- if (sc->rge_type == MAC_R26)
+ if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27)
RGE_CLRBIT_1(sc, RGE_INT_CFG0, 0x08);
else
RGE_CLRBIT_1(sc, RGE_CFG2, RGE_CFG2_CLKREQ_EN);
@@ -2674,15 +3123,16 @@ rge_switch_mcu_ram_page(struct rge_softc
rge_write_mac_ocp(sc, 0xe446, val);
}
-void
+int
rge_exit_oob(struct rge_softc *sc)
{
- int i;
+ int error, i;
/* Disable RealWoW. */
rge_write_mac_ocp(sc, 0xc0bc, 0x00ff);
- rge_reset(sc);
+ if ((error = rge_reset(sc)) != 0)
+ return error;
/* Disable OOB. */
RGE_CLRBIT_1(sc, RGE_MCUCMD, RGE_MCUCMD_IS_OOB);
@@ -2716,6 +3166,8 @@ rge_exit_oob(struct rge_softc *sc)
RGE_PHY_CLRBIT(sc, 0xa466, 0x0001);
RGE_PHY_CLRBIT(sc, 0xa468, 0x000a);
}
+
+ return 0;
}
void
@@ -2787,8 +3239,8 @@ rge_write_ephy(struct rge_softc *sc, uin
tmp |= RGE_EPHYAR_BUSY | (val & RGE_EPHYAR_DATA_MASK);
RGE_WRITE_4(sc, RGE_EPHYAR, tmp);
- for (i = 0; i < 10; i++) {
- DELAY(100);
+ for (i = 0; i < 20000; i++) {
+ DELAY(1);
if (!(RGE_READ_4(sc, RGE_EPHYAR) & RGE_EPHYAR_BUSY))
break;
}
@@ -2805,8 +3257,8 @@ rge_read_ephy(struct rge_softc *sc, uint
val = (reg & RGE_EPHYAR_ADDR_MASK) << RGE_EPHYAR_ADDR_SHIFT;
RGE_WRITE_4(sc, RGE_EPHYAR, val);
- for (i = 0; i < 10; i++) {
- DELAY(100);
+ for (i = 0; i < 20000; i++) {
+ DELAY(1);
val = RGE_READ_4(sc, RGE_EPHYAR);
if (val & RGE_EPHYAR_BUSY)
break;
@@ -2817,6 +3269,23 @@ rge_read_ephy(struct rge_softc *sc, uint
return (val & RGE_EPHYAR_DATA_MASK);
}
+uint16_t
+rge_check_ephy_ext_add(struct rge_softc *sc, uint16_t reg)
+{
+ uint16_t val;
+
+ val = (reg >> 12);
+ rge_write_ephy(sc, RGE_EPHYAR_EXT_ADDR, val);
+
+ return reg & 0x0fff;
+}
+
+void
+rge_r27_write_ephy(struct rge_softc *sc, uint16_t reg, uint16_t val)
+{
+ rge_write_ephy(sc, rge_check_ephy_ext_add(sc, reg), val);
+}
+
void
rge_write_phy(struct rge_softc *sc, uint16_t addr, uint16_t reg, uint16_t val)
{
@@ -2857,7 +3326,7 @@ rge_write_phy_ocp(struct rge_softc *sc,
tmp |= RGE_PHYOCP_BUSY | val;
RGE_WRITE_4(sc, RGE_PHYOCP, tmp);
- for (i = 0; i < RGE_TIMEOUT; i++) {
+ for (i = 0; i < 20000; i++) {
DELAY(1);
if (!(RGE_READ_4(sc, RGE_PHYOCP) & RGE_PHYOCP_BUSY))
break;
@@ -2873,7 +3342,7 @@ rge_read_phy_ocp(struct rge_softc *sc, u
val = (reg >> 1) << RGE_PHYOCP_ADDR_SHIFT;
RGE_WRITE_4(sc, RGE_PHYOCP, val);
- for (i = 0; i < RGE_TIMEOUT; i++) {
+ for (i = 0; i < 20000; i++) {
DELAY(1);
val = RGE_READ_4(sc, RGE_PHYOCP);
if (val & RGE_PHYOCP_BUSY)
Index: sys/dev/pci/if_rgereg.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_rgereg.h,v
diff -u -p -u -p -r1.14 if_rgereg.h
--- sys/dev/pci/if_rgereg.h 14 Apr 2025 05:37:58 -0000 1.14
+++ sys/dev/pci/if_rgereg.h 18 Sep 2025 01:46:23 -0000
@@ -63,8 +63,10 @@
#define RGE_RXDESC_ADDR_HI 0x00e8
#define RGE_PPSW 0x00f2
#define RGE_TIMERINT3 0x00f4
+#define RGE_RADMFIFO_PROTECT 0x0402
#define RGE_INTMITI(i) (0x0a00 + (i) * 4)
#define RGE_PHYBASE 0x0a40
+#define RGE_EPHYAR_EXT_ADDR 0x0ffe
#define RGE_ADDR0 0x19e0
#define RGE_ADDR1 0x19e4
#define RGE_RSS_CTRL 0x4500
@@ -75,6 +77,8 @@
#define RGE_INT_CFG0_EN 0x01
#define RGE_INT_CFG0_TIMEOUT_BYPASS 0x02
#define RGE_INT_CFG0_MITIGATION_BYPASS 0x04
+#define RGE_INT_CFG0_RDU_BYPASS_8126 0x10
+#define RGE_INT_CFG0_AVOID_MISS_INTR 0x40
/* Flags for register RGE_CMD */
#define RGE_CMD_RXBUF_EMPTY 0x01
@@ -156,6 +160,7 @@
#define RGE_PHYSTAT_TXFLOW 0x0040
#define RGE_PHYSTAT_2500MBPS 0x0400
#define RGE_PHYSTAT_5000MBPS 0x1000
+#define RGE_PHYSTAT_10000MBPS 0x4000
/* Flags for register RGE_EPHYAR */
#define RGE_EPHYAR_DATA_MASK 0x0000ffff
@@ -201,6 +206,7 @@
#define RGE_ADV_2500TFDX 0x0080
#define RGE_ADV_5000TFDX 0x0100
+#define RGE_ADV_10000TFDX 0x1000
/* Tx descriptor */
struct rge_tx_desc {
@@ -357,18 +363,20 @@ struct rge_queues {
struct rge_rx q_rx;
};
-/* Microcode version */
-#define RGE_MAC_R25D_MCODE_VER 0x0027
-#define RGE_MAC_R26_MCODE_VER 0x0033
-#define RGE_MAC_R25_MCODE_VER 0x0b33
-#define RGE_MAC_R25B_MCODE_VER 0x0b99
+/* Ram version */
+#define RGE_MAC_R25D_RCODE_VER 0x0027
+#define RGE_MAC_R26_RCODE_VER 0x0033
+#define RGE_MAC_R27_RCODE_VER 0x0036
+#define RGE_MAC_R25_RCODE_VER 0x0b33
+#define RGE_MAC_R25B_RCODE_VER 0x0b99
enum rge_mac_type {
MAC_UNKNOWN = 1,
MAC_R25,
MAC_R25B,
MAC_R25D,
- MAC_R26
+ MAC_R26,
+ MAC_R27
};
#define RGE_TIMEOUT 100
@@ -379,10 +387,10 @@ enum rge_mac_type {
ETHER_VLAN_ENCAP_LEN)
#define RGE_TXCFG_CONFIG 0x03000700
-#define RGE_RXCFG_CONFIG 0x41c00700
-#define RGE_RXCFG_CONFIG_8125B 0x41c00c00
-#define RGE_RXCFG_CONFIG_8125D 0x41e00c00
-#define RGE_RXCFG_CONFIG_8126 0x41e00d00
+#define RGE_RXCFG_CONFIG 0x41000700
+#define RGE_RXCFG_CONFIG_8125B 0x41000c00
+#define RGE_RXCFG_CONFIG_8125D 0x41200c00
+#define RGE_RXCFG_CONFIG_8126 0x41200d00
struct kstat;
@@ -406,7 +414,8 @@ struct rge_softc {
struct timeout sc_timeout; /* tick timeout */
- uint16_t rge_mcodever;
+ uint64_t rge_mcodever;
+ uint16_t rge_rcodever;
uint32_t rge_flags;
#define RGE_FLAG_MSI 0x00000001
@@ -604,6 +613,114 @@ static const struct {
{ 0xf902, 0x0000 }, { 0xfc26, 0x8000 }, { 0xfc28, 0x13e6 },
{ 0xfc2a, 0x0812 }, { 0xfc2c, 0x248c }, { 0xfc2e, 0x12da },
{ 0xfc30, 0x4a20 }, { 0xfc32, 0x47a0 }, { 0xfc48, 0x003f }
+}, rtl8127_mac_bps[] = {
+ { 0xf800, 0xe010 }, { 0xf802, 0xe023 }, { 0xf804, 0xe036 },
+ { 0xf806, 0xe049 }, { 0xf808, 0xe05c }, { 0xf80a, 0xe075 },
+ { 0xf80c, 0xe0b1 }, { 0xf80e, 0xe117 }, { 0xf810, 0xe11b },
+ { 0xf812, 0xe11d }, { 0xf814, 0xe11f }, { 0xf816, 0xe121 },
+ { 0xf818, 0xe123 }, { 0xf81a, 0xe125 }, { 0xf81c, 0xe127 },
+ { 0xf81e, 0xe129 }, { 0xf820, 0x7020 }, { 0xf822, 0xb405 },
+ { 0xf824, 0xb404 }, { 0xf826, 0xc50f }, { 0xf828, 0x74a0 },
+ { 0xf82a, 0xc50e }, { 0xf82c, 0x4025 }, { 0xf82e, 0xf005 },
+ { 0xf830, 0x4850 }, { 0xf832, 0x4025 }, { 0xf834, 0xf002 },
+ { 0xf836, 0xe002 }, { 0xf838, 0x4809 }, { 0xf83a, 0xb004 },
+ { 0xf83c, 0xb005 }, { 0xf83e, 0xc502 }, { 0xf840, 0xbd00 },
+ { 0xf842, 0x1522 }, { 0xf844, 0xd006 }, { 0xf846, 0x0004 },
+ { 0xf848, 0x7760 }, { 0xf84a, 0xb405 }, { 0xf84c, 0xb404 },
+ { 0xf84e, 0xc50f }, { 0xf850, 0x74a0 }, { 0xf852, 0xc50e },
+ { 0xf854, 0x4025 }, { 0xf856, 0xf005 }, { 0xf858, 0x4850 },
+ { 0xf85a, 0x4025 }, { 0xf85c, 0xf002 }, { 0xf85e, 0xe002 },
+ { 0xf860, 0x4879 }, { 0xf862, 0xb004 }, { 0xf864, 0xb005 },
+ { 0xf866, 0xc002 }, { 0xf868, 0xb800 }, { 0xf86a, 0x41e2 },
+ { 0xf86c, 0xd006 }, { 0xf86e, 0x0004 }, { 0xf870, 0x7160 },
+ { 0xf872, 0xb405 }, { 0xf874, 0xb404 }, { 0xf876, 0xc50f },
+ { 0xf878, 0x74a0 }, { 0xf87a, 0xc50e }, { 0xf87c, 0x4025 },
+ { 0xf87e, 0xf005 }, { 0xf880, 0x4850 }, { 0xf882, 0x4025 },
+ { 0xf884, 0xf002 }, { 0xf886, 0xe002 }, { 0xf888, 0x4819 },
+ { 0xf88a, 0xb004 }, { 0xf88c, 0xb005 }, { 0xf88e, 0xc302 },
+ { 0xf890, 0xbb00 }, { 0xf892, 0x508e }, { 0xf894, 0xd006 },
+ { 0xf896, 0x0004 }, { 0xf898, 0x7720 }, { 0xf89a, 0xb405 },
+ { 0xf89c, 0xb404 }, { 0xf89e, 0xc50f }, { 0xf8a0, 0x74a0 },
+ { 0xf8a2, 0xc50e }, { 0xf8a4, 0x4025 }, { 0xf8a6, 0xf005 },
+ { 0xf8a8, 0x4850 }, { 0xf8aa, 0x4025 }, { 0xf8ac, 0xf002 },
+ { 0xf8ae, 0xe002 }, { 0xf8b0, 0x4879 }, { 0xf8b2, 0xb004 },
+ { 0xf8b4, 0xb005 }, { 0xf8b6, 0xc102 }, { 0xf8b8, 0xb900 },
+ { 0xf8ba, 0x50f8 }, { 0xf8bc, 0xd006 }, { 0xf8be, 0x0004 },
+ { 0xf8c0, 0x61a9 }, { 0xf8c2, 0xb403 }, { 0xf8c4, 0xb404 },
+ { 0xf8c6, 0xc313 }, { 0xf8c8, 0x7460 }, { 0xf8ca, 0xc312 },
+ { 0xf8cc, 0x4023 }, { 0xf8ce, 0xf005 }, { 0xf8d0, 0x4830 },
+ { 0xf8d2, 0x4023 }, { 0xf8d4, 0xf002 }, { 0xf8d6, 0xe003 },
+ { 0xf8d8, 0x4997 }, { 0xf8da, 0xf003 }, { 0xf8dc, 0xc00a },
+ { 0xf8de, 0xe002 }, { 0xf8e0, 0xc009 }, { 0xf8e2, 0xb004 },
+ { 0xf8e4, 0xb003 }, { 0xf8e6, 0xc102 }, { 0xf8e8, 0xb900 },
+ { 0xf8ea, 0x34fc }, { 0xf8ec, 0xd006 }, { 0xf8ee, 0x0004 },
+ { 0xf8f0, 0x02af }, { 0xf8f2, 0x041f }, { 0xf8f4, 0xb407 },
+ { 0xf8f6, 0xb406 }, { 0xf8f8, 0xb405 }, { 0xf8fa, 0xb404 },
+ { 0xf8fc, 0xb403 }, { 0xf8fe, 0xb402 }, { 0xf900, 0xb401 },
+ { 0xf902, 0xb400 }, { 0xf904, 0x49d2 }, { 0xf906, 0xf116 },
+ { 0xf908, 0xc62f }, { 0xf90a, 0x77c0 }, { 0xf90c, 0x49f9 },
+ { 0xf90e, 0xf020 }, { 0xf910, 0x49fa }, { 0xf912, 0xf11e },
+ { 0xf914, 0x49f2 }, { 0xf916, 0xf102 }, { 0xf918, 0xe01b },
+ { 0xf91a, 0x48f2 }, { 0xf91c, 0x9fc0 }, { 0xf91e, 0xc625 },
+ { 0xf920, 0x75c2 }, { 0xf922, 0x4852 }, { 0xf924, 0x9dc2 },
+ { 0xf926, 0xc122 }, { 0xf928, 0x7020 }, { 0xf92a, 0x4801 },
+ { 0xf92c, 0x4802 }, { 0xf92e, 0x9820 }, { 0xf930, 0xe00f },
+ { 0xf932, 0xc61a }, { 0xf934, 0x77c0 }, { 0xf936, 0x49f2 },
+ { 0xf938, 0xf10b }, { 0xf93a, 0xc618 }, { 0xf93c, 0x77c0 },
+ { 0xf93e, 0x49f2 }, { 0xf940, 0xf007 }, { 0xf942, 0x48f2 },
+ { 0xf944, 0x9fc0 }, { 0xf946, 0xc611 }, { 0xf948, 0x75c2 },
+ { 0xf94a, 0x48d2 }, { 0xf94c, 0x9dc2 }, { 0xf94e, 0xb000 },
+ { 0xf950, 0xb001 }, { 0xf952, 0xb002 }, { 0xf954, 0xb003 },
+ { 0xf956, 0xb004 }, { 0xf958, 0xb005 }, { 0xf95a, 0xb006 },
+ { 0xf95c, 0xb007 }, { 0xf95e, 0x9d6c }, { 0xf960, 0xc502 },
+ { 0xf962, 0xbd00 }, { 0xf964, 0x0168 }, { 0xf966, 0xe024 },
+ { 0xf968, 0xc010 }, { 0xf96a, 0xd410 }, { 0xf96c, 0xd460 },
+ { 0xf96e, 0xb407 }, { 0xf970, 0xb406 }, { 0xf972, 0xb405 },
+ { 0xf974, 0xb404 }, { 0xf976, 0xb403 }, { 0xf978, 0xb402 },
+ { 0xf97a, 0xb401 }, { 0xf97c, 0xb400 }, { 0xf97e, 0xc152 },
+ { 0xf980, 0x7020 }, { 0xf982, 0x4981 }, { 0xf984, 0xf043 },
+ { 0xf986, 0xc050 }, { 0xf988, 0x7100 }, { 0xf98a, 0xb401 },
+ { 0xf98c, 0xc14c }, { 0xf98e, 0x489e }, { 0xf990, 0x481d },
+ { 0xf992, 0x9900 }, { 0xf994, 0xc24a }, { 0xf996, 0x7340 },
+ { 0xf998, 0x49b7 }, { 0xf99a, 0xf135 }, { 0xf99c, 0xc144 },
+ { 0xf99e, 0x9900 }, { 0xf9a0, 0xc245 }, { 0xf9a2, 0x7340 },
+ { 0xf9a4, 0xc447 }, { 0xf9a6, 0x401c }, { 0xf9a8, 0xf109 },
+ { 0xf9aa, 0x734c }, { 0xf9ac, 0x1301 }, { 0xf9ae, 0xf12b },
+ { 0xf9b0, 0xc343 }, { 0xf9b2, 0x9b40 }, { 0xf9b4, 0xc33e },
+ { 0xf9b6, 0x9b40 }, { 0xf9b8, 0xe022 }, { 0xf9ba, 0xc63a },
+ { 0xf9bc, 0x77c0 }, { 0xf9be, 0x48f4 }, { 0xf9c0, 0x48f5 },
+ { 0xf9c2, 0x48f9 }, { 0xf9c4, 0x48fa }, { 0xf9c6, 0x9fc0 },
+ { 0xf9c8, 0xc231 }, { 0xf9ca, 0x7344 }, { 0xf9cc, 0x48b4 },
+ { 0xf9ce, 0x9b44 }, { 0xf9d0, 0xc22e }, { 0xf9d2, 0x7340 },
+ { 0xf9d4, 0x4830 }, { 0xf9d6, 0x48b1 }, { 0xf9d8, 0x4832 },
+ { 0xf9da, 0x483c }, { 0xf9dc, 0x48bd }, { 0xf9de, 0x48be },
+ { 0xf9e0, 0x48bf }, { 0xf9e2, 0x9b40 }, { 0xf9e4, 0xc223 },
+ { 0xf9e6, 0xc32a }, { 0xf9e8, 0x9b48 }, { 0xf9ea, 0xc327 },
+ { 0xf9ec, 0x9b46 }, { 0xf9ee, 0xc324 }, { 0xf9f0, 0x9b40 },
+ { 0xf9f2, 0xc321 }, { 0xf9f4, 0x9b42 }, { 0xf9f6, 0xc31e },
+ { 0xf9f8, 0x9b40 }, { 0xf9fa, 0xe005 }, { 0xf9fc, 0xc113 },
+ { 0xf9fe, 0x7020 }, { 0xf800, 0x4881 }, { 0xf802, 0x9820 },
+ { 0xf804, 0xb001 }, { 0xf806, 0xc010 }, { 0xf808, 0x9900 },
+ { 0xf80a, 0xb000 }, { 0xf80c, 0xb001 }, { 0xf80e, 0xb002 },
+ { 0xf810, 0xb003 }, { 0xf812, 0xb004 }, { 0xf814, 0xb005 },
+ { 0xf816, 0xb006 }, { 0xf818, 0xb007 }, { 0xf81a, 0x2125 },
+ { 0xf81c, 0xc102 }, { 0xf81e, 0xb900 }, { 0xf820, 0x1a6c },
+ { 0xf822, 0xd410 }, { 0xf824, 0xc000 }, { 0xf826, 0xe86c },
+ { 0xf828, 0xb600 }, { 0xf82a, 0xb800 }, { 0xf82c, 0xb40a },
+ { 0xf82e, 0xe024 }, { 0xf830, 0x5a00 }, { 0xf832, 0x5a81 },
+ { 0xf834, 0x0073 }, { 0xf836, 0x5a80 }, { 0xf838, 0x0042 },
+ { 0xf83a, 0x0001 }, { 0xf83c, 0xc104 }, { 0xf83e, 0xc202 },
+ { 0xf840, 0xba00 }, { 0xf842, 0x1a2e }, { 0xf844, 0xc896 },
+ { 0xf846, 0xc302 }, { 0xf848, 0xbb00 }, { 0xf84a, 0x0000 },
+ { 0xf84c, 0xc002 }, { 0xf84e, 0xb800 }, { 0xf850, 0x0000 },
+ { 0xf852, 0xc002 }, { 0xf854, 0xb800 }, { 0xf856, 0x0000 },
+ { 0xf858, 0xc502 }, { 0xf85a, 0xbd00 }, { 0xf85c, 0x0000 },
+ { 0xf85e, 0xc102 }, { 0xf860, 0xb900 }, { 0xf862, 0x0000 },
+ { 0xf864, 0xc102 }, { 0xf866, 0xb900 }, { 0xf868, 0x0000 },
+ { 0xf86a, 0xc602 }, { 0xf86c, 0xbe00 }, { 0xf86e, 0x0000 },
+ { 0xf870, 0xc602 }, { 0xf872, 0xbe00 }, { 0xf874, 0x0000 },
+ { 0xf876, 0x6961 }, { 0xf878, 0x0019 }, { 0xf87a, 0x050c },
+ { 0xf87c, 0x140c }
};
static const struct {
@@ -619,6 +736,676 @@ static const struct {
{ 0x0002, 0x60c2 }, { 0x0029, 0xff00 }, { 0x004b, 0xa908 },
{ 0x005e, 0x28eb }, { 0x0062, 0x0023 }, { 0x0042, 0x60c2 },
{ 0x0069, 0xff00 }
+}, mac_r27_ephy[] = {
+ { 0x8088, 0x0064 }, { 0x8488, 0x0064 }, { 0x8888, 0x0064 },
+ { 0x8c88, 0x0064 }, { 0x8188, 0x0064 }, { 0x8588, 0x0064 },
+ { 0x8988, 0x0064 }, { 0x8d88, 0x0064 }, { 0x808c, 0x09b0 },
+ { 0x848c, 0x09b0 }, { 0x888c, 0x0f90 }, { 0x8c8c, 0x0f90 },
+ { 0x818c, 0x09b0 }, { 0x858c, 0x09b0 }, { 0x898c, 0x0f90 },
+ { 0x8d8c, 0x0f90 }, { 0x808a, 0x09b8 }, { 0x848a, 0x09b8 },
+ { 0x888a, 0x0f98 }, { 0x8c8a, 0x0f98 }, { 0x818a, 0x09b8 },
+ { 0x858a, 0x09b8 }, { 0x898a, 0x0f98 }, { 0x8d8a, 0x0f98 },
+ { 0x9020, 0x0080 }, { 0x9420, 0x0080 }, { 0x9820, 0x0080 },
+ { 0x9c20, 0x0080 }, { 0x901e, 0x0190 }, { 0x941e, 0x0190 },
+ { 0x981e, 0x0140 }, { 0x9c1e, 0x0140 }, { 0x901c, 0x0190 },
+ { 0x941c, 0x0190 }, { 0x981c, 0x0140 }, { 0x9c1c, 0x0140 }
+};
+
+static const struct {
+ uint16_t reg;
+ uint16_t val;
+} mac_r27_mcu[] = {
+ { 0xa436, 0x8023 }, { 0xa438, 0x6100 }, { 0xa436, 0xb82e },
+ { 0xa438, 0x0001 }, { 0xb820, 0x0090 }, { 0xa436, 0xa016 },
+ { 0xa438, 0x0000 }, { 0xa436, 0xa012 }, { 0xa438, 0x0000 },
+ { 0xa436, 0xa014 }, { 0xa438, 0x1800 }, { 0xa438, 0x8010 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x801a }, { 0xa438, 0x1800 },
+ { 0xa438, 0x801a }, { 0xa438, 0x1800 }, { 0xa438, 0x801a },
+ { 0xa438, 0x1800 }, { 0xa438, 0x801a }, { 0xa438, 0x1800 },
+ { 0xa438, 0x801a }, { 0xa438, 0x1800 }, { 0xa438, 0x801a },
+ { 0xa438, 0x1800 }, { 0xa438, 0x801a }, { 0xa438, 0xce00 },
+ { 0xa438, 0x2941 }, { 0xa438, 0x8017 }, { 0xa438, 0x2c59 },
+ { 0xa438, 0x8017 }, { 0xa438, 0x1800 }, { 0xa438, 0x0e11 },
+ { 0xa438, 0x8aff }, { 0xa438, 0x1800 }, { 0xa438, 0x0e11 },
+ { 0xa436, 0xa026 }, { 0xa438, 0xffff }, { 0xa436, 0xa024 },
+ { 0xa438, 0xffff }, { 0xa436, 0xa022 }, { 0xa438, 0xffff },
+ { 0xa436, 0xa020 }, { 0xa438, 0xffff }, { 0xa436, 0xa006 },
+ { 0xa438, 0xffff }, { 0xa436, 0xa004 }, { 0xa438, 0xffff },
+ { 0xa436, 0xa002 }, { 0xa438, 0xffff }, { 0xa436, 0xa000 },
+ { 0xa438, 0x0e10 }, { 0xa436, 0xa008 }, { 0xa438, 0x0100 },
+ { 0xa436, 0xa016 }, { 0xa438, 0x0000 }, { 0xa436, 0xa012 },
+ { 0xa438, 0x0ff8 }, { 0xa436, 0xa014 }, { 0xa438, 0x219a },
+ { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, { 0xa438, 0x0000 },
+ { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, { 0xa438, 0x0000 },
+ { 0xa438, 0x0000 }, { 0xa436, 0xa152 }, { 0xa438, 0x21a4 },
+ { 0xa436, 0xa154 }, { 0xa438, 0x3fff }, { 0xa436, 0xa156 },
+ { 0xa438, 0x3fff }, { 0xa436, 0xa158 }, { 0xa438, 0x3fff },
+ { 0xa436, 0xa15a }, { 0xa438, 0x3fff }, { 0xa436, 0xa15c },
+ { 0xa438, 0x3fff }, { 0xa436, 0xa15e }, { 0xa438, 0x3fff },
+ { 0xa436, 0xa160 }, { 0xa438, 0x3fff }, { 0xa436, 0xa150 },
+ { 0xa438, 0x0001 }, { 0xa436, 0xa016 }, { 0xa438, 0x0010 },
+ { 0xa436, 0xa012 }, { 0xa438, 0x0000 }, { 0xa436, 0xa014 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x8010 }, { 0xa438, 0x1800 },
+ { 0xa438, 0x8014 }, { 0xa438, 0x1800 }, { 0xa438, 0x801a },
+ { 0xa438, 0x1800 }, { 0xa438, 0x801e }, { 0xa438, 0x1800 },
+ { 0xa438, 0x8026 }, { 0xa438, 0x1800 }, { 0xa438, 0x802e },
+ { 0xa438, 0x1800 }, { 0xa438, 0x8036 }, { 0xa438, 0x1800 },
+ { 0xa438, 0x803a }, { 0xa438, 0xce01 }, { 0xa438, 0x8208 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x0028 }, { 0xa438, 0x1000 },
+ { 0xa438, 0x02c5 }, { 0xa438, 0x1000 }, { 0xa438, 0x0304 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x0119 }, { 0xa438, 0xce01 },
+ { 0xa438, 0x8208 }, { 0xa438, 0x1800 }, { 0xa438, 0x009e },
+ { 0xa438, 0xd501 }, { 0xa438, 0xce01 }, { 0xa438, 0xa50f },
+ { 0xa438, 0x8208 }, { 0xa438, 0xd500 }, { 0xa438, 0xaa0f },
+ { 0xa438, 0x1800 }, { 0xa438, 0x015b }, { 0xa438, 0xd501 },
+ { 0xa438, 0xce01 }, { 0xa438, 0xa50f }, { 0xa438, 0x8208 },
+ { 0xa438, 0xd500 }, { 0xa438, 0xaa0f }, { 0xa438, 0x1800 },
+ { 0xa438, 0x01a9 }, { 0xa438, 0xd501 }, { 0xa438, 0xce01 },
+ { 0xa438, 0xa50f }, { 0xa438, 0x8208 }, { 0xa438, 0xd500 },
+ { 0xa438, 0xaa0f }, { 0xa438, 0x1800 }, { 0xa438, 0x01f4 },
+ { 0xa438, 0x8208 }, { 0xa438, 0xd500 }, { 0xa438, 0x1800 },
+ { 0xa438, 0x02a5 }, { 0xa438, 0xa208 }, { 0xa438, 0xd500 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x02b8 }, { 0xa436, 0xa08e },
+ { 0xa438, 0x02b7 }, { 0xa436, 0xa08c }, { 0xa438, 0x02a4 },
+ { 0xa436, 0xa08a }, { 0xa438, 0x01e7 }, { 0xa436, 0xa088 },
+ { 0xa438, 0x019c }, { 0xa436, 0xa086 }, { 0xa438, 0x014e },
+ { 0xa436, 0xa084 }, { 0xa438, 0x009d }, { 0xa436, 0xa082 },
+ { 0xa438, 0x0117 }, { 0xa436, 0xa080 }, { 0xa438, 0x0027 },
+ { 0xa436, 0xa090 }, { 0xa438, 0x00ff }, { 0xa436, 0xa016 },
+ { 0xa438, 0x0020 }, { 0xa436, 0xa012 }, { 0xa438, 0x0000 },
+ { 0xa436, 0xa014 }, { 0xa438, 0x1800 }, { 0xa438, 0x8010 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x801d }, { 0xa438, 0x1800 },
+ { 0xa438, 0x803b }, { 0xa438, 0x1800 }, { 0xa438, 0x8087 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x808e }, { 0xa438, 0x1800 },
+ { 0xa438, 0x809d }, { 0xa438, 0x1800 }, { 0xa438, 0x80b7 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x80c4 }, { 0xa438, 0xd1bc },
+ { 0xa438, 0xd040 }, { 0xa438, 0x1000 }, { 0xa438, 0x1cd2 },
+ { 0xa438, 0xd700 }, { 0xa438, 0x5fba }, { 0xa438, 0xd700 },
+ { 0xa438, 0x273d }, { 0xa438, 0x801b }, { 0xa438, 0x1800 },
+ { 0xa438, 0x07d1 }, { 0xa438, 0x1800 }, { 0xa438, 0x080e },
+ { 0xa438, 0xd700 }, { 0xa438, 0x37c9 }, { 0xa438, 0x8032 },
+ { 0xa438, 0x33a9 }, { 0xa438, 0x802a }, { 0xa438, 0xd705 },
+ { 0xa438, 0x4084 }, { 0xa438, 0xd1f4 }, { 0xa438, 0xd048 },
+ { 0xa438, 0xf013 }, { 0xa438, 0xd1b7 }, { 0xa438, 0xd04b },
+ { 0xa438, 0xf010 }, { 0xa438, 0xd705 }, { 0xa438, 0x4084 },
+ { 0xa438, 0xd1f4 }, { 0xa438, 0xd048 }, { 0xa438, 0xf00b },
+ { 0xa438, 0xd1b7 }, { 0xa438, 0xd04b }, { 0xa438, 0xf008 },
+ { 0xa438, 0xd705 }, { 0xa438, 0x4084 }, { 0xa438, 0xd1f4 },
+ { 0xa438, 0xd048 }, { 0xa438, 0xf003 }, { 0xa438, 0xd1b7 },
+ { 0xa438, 0xd04b }, { 0xa438, 0x1800 }, { 0xa438, 0x14cc },
+ { 0xa438, 0xd700 }, { 0xa438, 0x2b59 }, { 0xa438, 0x803f },
+ { 0xa438, 0xf003 }, { 0xa438, 0x1800 }, { 0xa438, 0x118f },
+ { 0xa438, 0x6060 }, { 0xa438, 0x1800 }, { 0xa438, 0x1167 },
+ { 0xa438, 0xd700 }, { 0xa438, 0x60c7 }, { 0xa438, 0xd704 },
+ { 0xa438, 0x609f }, { 0xa438, 0xd705 }, { 0xa438, 0x4043 },
+ { 0xa438, 0xf003 }, { 0xa438, 0x1800 }, { 0xa438, 0x1150 },
+ { 0xa438, 0x0c03 }, { 0xa438, 0x1502 }, { 0xa438, 0x8702 },
+ { 0xa438, 0x8011 }, { 0xa438, 0x9503 }, { 0xa438, 0x800a },
+ { 0xa438, 0x81a0 }, { 0xa438, 0x8302 }, { 0xa438, 0x8480 },
+ { 0xa438, 0x8686 }, { 0xa438, 0xcde0 }, { 0xa438, 0xd1ff },
+ { 0xa438, 0xd049 }, { 0xa438, 0x1000 }, { 0xa438, 0x1cd2 },
+ { 0xa438, 0xd700 }, { 0xa438, 0x5fba }, { 0xa438, 0xd705 },
+ { 0xa438, 0x417e }, { 0xa438, 0x0c03 }, { 0xa438, 0x1502 },
+ { 0xa438, 0xa011 }, { 0xa438, 0x9503 }, { 0xa438, 0xd1c8 },
+ { 0xa438, 0xd045 }, { 0xa438, 0x1000 }, { 0xa438, 0x1cd2 },
+ { 0xa438, 0xd700 }, { 0xa438, 0x5fba }, { 0xa438, 0x0c03 },
+ { 0xa438, 0x1502 }, { 0xa438, 0xa702 }, { 0xa438, 0x9503 },
+ { 0xa438, 0xa00a }, { 0xa438, 0xa1a0 }, { 0xa438, 0xa480 },
+ { 0xa438, 0xa686 }, { 0xa438, 0xd705 }, { 0xa438, 0x605e },
+ { 0xa438, 0xa302 }, { 0xa438, 0x9503 }, { 0xa438, 0xd700 },
+ { 0xa438, 0x37c9 }, { 0xa438, 0x8083 }, { 0xa438, 0x33a9 },
+ { 0xa438, 0x807f }, { 0xa438, 0xd178 }, { 0xa438, 0xd04b },
+ { 0xa438, 0x1800 }, { 0xa438, 0x115d }, { 0xa438, 0xd1c8 },
+ { 0xa438, 0xd04b }, { 0xa438, 0x1800 }, { 0xa438, 0x115d },
+ { 0xa438, 0xd1e6 }, { 0xa438, 0xd04b }, { 0xa438, 0x1800 },
+ { 0xa438, 0x115d }, { 0xa438, 0xd71f }, { 0xa438, 0x6080 },
+ { 0xa438, 0xd704 }, { 0xa438, 0x1800 }, { 0xa438, 0x1bc0 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x1bc4 }, { 0xa438, 0x4134 },
+ { 0xa438, 0xd115 }, { 0xa438, 0xd04f }, { 0xa438, 0x1000 },
+ { 0xa438, 0x1d0b }, { 0xa438, 0x1000 }, { 0xa438, 0x80ad },
+ { 0xa438, 0x1800 }, { 0xa438, 0x01f2 }, { 0xa438, 0x1000 },
+ { 0xa438, 0x1d0b }, { 0xa438, 0x1000 }, { 0xa438, 0x80ad },
+ { 0xa438, 0x1800 }, { 0xa438, 0x01f9 }, { 0xa438, 0x2969 },
+ { 0xa438, 0x80a3 }, { 0xa438, 0xd700 }, { 0xa438, 0x606b },
+ { 0xa438, 0xd701 }, { 0xa438, 0x60b4 }, { 0xa438, 0x1000 },
+ { 0xa438, 0x80ad }, { 0xa438, 0x1800 }, { 0xa438, 0x0551 },
+ { 0xa438, 0xd196 }, { 0xa438, 0xd04d }, { 0xa438, 0x1000 },
+ { 0xa438, 0x80ad }, { 0xa438, 0x1800 }, { 0xa438, 0x054d },
+ { 0xa438, 0xd208 }, { 0xa438, 0x0c09 }, { 0xa438, 0x1301 },
+ { 0xa438, 0x1000 }, { 0xa438, 0x1cd2 }, { 0xa438, 0xd701 },
+ { 0xa438, 0x5fa3 }, { 0xa438, 0xb302 }, { 0xa438, 0xd200 },
+ { 0xa438, 0x0800 }, { 0xa438, 0xd705 }, { 0xa438, 0x6064 },
+ { 0xa438, 0x1800 }, { 0xa438, 0x140a }, { 0xa438, 0x8810 },
+ { 0xa438, 0xd199 }, { 0xa438, 0xd04b }, { 0xa438, 0x1000 },
+ { 0xa438, 0x1cd2 }, { 0xa438, 0xd700 }, { 0xa438, 0x5fba },
+ { 0xa438, 0x1800 }, { 0xa438, 0x140a }, { 0xa438, 0x8910 },
+ { 0xa438, 0xd704 }, { 0xa438, 0x61a8 }, { 0xa438, 0x8480 },
+ { 0xa438, 0x8604 }, { 0xa438, 0x8302 }, { 0xa438, 0x81a0 },
+ { 0xa438, 0xd703 }, { 0xa438, 0x4112 }, { 0xa438, 0x0c03 },
+ { 0xa438, 0x1502 }, { 0xa438, 0xa990 }, { 0xa438, 0x9503 },
+ { 0xa438, 0xb904 }, { 0xa438, 0xf002 }, { 0xa438, 0x0000 },
+ { 0xa438, 0x0800 }, { 0xa436, 0xa10e }, { 0xa438, 0x1de8 },
+ { 0xa436, 0xa10c }, { 0xa438, 0x1352 }, { 0xa436, 0xa10a },
+ { 0xa438, 0x0545 }, { 0xa436, 0xa108 }, { 0xa438, 0x01ed },
+ { 0xa436, 0xa106 }, { 0xa438, 0x1bbf }, { 0xa436, 0xa104 },
+ { 0xa438, 0x114b }, { 0xa436, 0xa102 }, { 0xa438, 0x14bf },
+ { 0xa436, 0xa100 }, { 0xa438, 0x07ce }, { 0xa436, 0xa110 },
+ { 0xa438, 0x00ff }, { 0xa436, 0xa016 }, { 0xa438, 0x0020 },
+ { 0xa436, 0xa012 }, { 0xa438, 0x1ff8 }, { 0xa436, 0xa014 },
+ { 0xa438, 0xd1ce }, { 0xa438, 0x0000 }, { 0xa438, 0x0000 },
+ { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, { 0xa438, 0x0000 },
+ { 0xa438, 0x0000 }, { 0xa438, 0x0000 }, { 0xa436, 0xa164 },
+ { 0xa438, 0x07fc }, { 0xa436, 0xa166 }, { 0xa438, 0x143d },
+ { 0xa436, 0xa168 }, { 0xa438, 0x3fff }, { 0xa436, 0xa16a },
+ { 0xa438, 0x3fff }, { 0xa436, 0xa16c }, { 0xa438, 0x3fff },
+ { 0xa436, 0xa16e }, { 0xa438, 0x3fff }, { 0xa436, 0xa170 },
+ { 0xa438, 0x3fff }, { 0xa436, 0xa172 }, { 0xa438, 0x3fff },
+ { 0xa436, 0xa162 }, { 0xa438, 0x0003 }, { 0xa436, 0xb87c },
+ { 0xa438, 0x8994 }, { 0xa436, 0xb87e }, { 0xa438, 0xaf89 },
+ { 0xa438, 0xacaf }, { 0xa438, 0x89e4 }, { 0xa438, 0xaf89 },
+ { 0xa438, 0xecaf }, { 0xa438, 0x8a04 }, { 0xa438, 0xaf8a },
+ { 0xa438, 0x2eaf }, { 0xa438, 0x8a4a }, { 0xa438, 0xaf8d },
+ { 0xa438, 0x31af }, { 0xa438, 0x8dc6 }, { 0xa438, 0x1f55 },
+ { 0xa438, 0xe18f }, { 0xa438, 0xe3a1 }, { 0xa438, 0x0007 },
+ { 0xa438, 0xee86 }, { 0xa438, 0xe900 }, { 0xa438, 0xaf4f },
+ { 0xa438, 0x9ead }, { 0xa438, 0x281b }, { 0xa438, 0xe18f },
+ { 0xa438, 0xfcef }, { 0xa438, 0x71bf }, { 0xa438, 0x74f6 },
+ { 0xa438, 0x027e }, { 0xa438, 0xd2ef }, { 0xa438, 0x641c },
+ { 0xa438, 0x670d }, { 0xa438, 0x67ef }, { 0xa438, 0x461f },
+ { 0xa438, 0x00bf }, { 0xa438, 0x74f6 }, { 0xa438, 0x027e },
+ { 0xa438, 0xdee1 }, { 0xa438, 0x8fe3 }, { 0xa438, 0x0d11 },
+ { 0xa438, 0xe58f }, { 0xa438, 0xe313 }, { 0xa438, 0xaeca },
+ { 0xa438, 0x028d }, { 0xa438, 0xd1d3 }, { 0xa438, 0x01af },
+ { 0xa438, 0x40d1 }, { 0xa438, 0xbf7a }, { 0xa438, 0x6102 },
+ { 0xa438, 0x7d44 }, { 0xa438, 0xa100 }, { 0xa438, 0x09e0 },
+ { 0xa438, 0x8ffa }, { 0xa438, 0xe18f }, { 0xa438, 0xfbaf },
+ { 0xa438, 0x683d }, { 0xa438, 0x027f }, { 0xa438, 0xa9af },
+ { 0xa438, 0x682c }, { 0xa438, 0xbf8e }, { 0xa438, 0x4102 },
+ { 0xa438, 0x7d44 }, { 0xa438, 0xe58f }, { 0xa438, 0xecbf },
+ { 0xa438, 0x74cc }, { 0xa438, 0x027d }, { 0xa438, 0x44e3 },
+ { 0xa438, 0x8fed }, { 0xa438, 0x0d31 }, { 0xa438, 0xf63f },
+ { 0xa438, 0x0d11 }, { 0xa438, 0xf62f }, { 0xa438, 0x1b13 },
+ { 0xa438, 0xad2f }, { 0xa438, 0x06bf }, { 0xa438, 0x8e41 },
+ { 0xa438, 0x027c }, { 0xa438, 0xf9d1 }, { 0xa438, 0x01af },
+ { 0xa438, 0x5974 }, { 0xa438, 0xee88 }, { 0xa438, 0x8600 },
+ { 0xa438, 0xe08f }, { 0xa438, 0xebad }, { 0xa438, 0x200b },
+ { 0xa438, 0xe18f }, { 0xa438, 0xecbf }, { 0xa438, 0x8e41 },
+ { 0xa438, 0x027d }, { 0xa438, 0x25ae }, { 0xa438, 0x04ee },
+ { 0xa438, 0x8feb }, { 0xa438, 0x01af }, { 0xa438, 0x5945 },
+ { 0xa438, 0xad28 }, { 0xa438, 0x2ce0 }, { 0xa438, 0x8fea },
+ { 0xa438, 0xa000 }, { 0xa438, 0x0502 }, { 0xa438, 0x8af0 },
+ { 0xa438, 0xae1e }, { 0xa438, 0xa001 }, { 0xa438, 0x0502 },
+ { 0xa438, 0x8b9f }, { 0xa438, 0xae16 }, { 0xa438, 0xa002 },
+ { 0xa438, 0x0502 }, { 0xa438, 0x8c0f }, { 0xa438, 0xae0e },
+ { 0xa438, 0xa003 }, { 0xa438, 0x0502 }, { 0xa438, 0x8c95 },
+ { 0xa438, 0xae06 }, { 0xa438, 0xa004 }, { 0xa438, 0x0302 },
+ { 0xa438, 0x8d08 }, { 0xa438, 0xaf63 }, { 0xa438, 0x8902 },
+ { 0xa438, 0x8a7f }, { 0xa438, 0xaf63 }, { 0xa438, 0x81f8 },
+ { 0xa438, 0xef49 }, { 0xa438, 0xf8e0 }, { 0xa438, 0x8015 },
+ { 0xa438, 0xad21 }, { 0xa438, 0x19bf }, { 0xa438, 0x7bd8 },
+ { 0xa438, 0x027c }, { 0xa438, 0xf9bf }, { 0xa438, 0x7bf3 },
+ { 0xa438, 0x027d }, { 0xa438, 0x44bf }, { 0xa438, 0x7bf6 },
+ { 0xa438, 0x027c }, { 0xa438, 0xf902 }, { 0xa438, 0x638e },
+ { 0xa438, 0xee8f }, { 0xa438, 0xea00 }, { 0xa438, 0xe080 },
+ { 0xa438, 0x16ad }, { 0xa438, 0x233d }, { 0xa438, 0xbf7b },
+ { 0xa438, 0xf302 }, { 0xa438, 0x7d44 }, { 0xa438, 0xbf7a },
+ { 0xa438, 0x9402 }, { 0xa438, 0x7cf9 }, { 0xa438, 0xbf8e },
+ { 0xa438, 0x4402 }, { 0xa438, 0x7cf9 }, { 0xa438, 0xbf7a },
+ { 0xa438, 0xa602 }, { 0xa438, 0x7cf9 }, { 0xa438, 0xbf7a },
+ { 0xa438, 0xa302 }, { 0xa438, 0x7cf9 }, { 0xa438, 0xbf7a },
+ { 0xa438, 0xa902 }, { 0xa438, 0x7cf9 }, { 0xa438, 0xbf7a },
+ { 0xa438, 0xac02 }, { 0xa438, 0x7cf9 }, { 0xa438, 0xbf8e },
+ { 0xa438, 0x4702 }, { 0xa438, 0x7cf9 }, { 0xa438, 0xbf8e },
+ { 0xa438, 0x4a02 }, { 0xa438, 0x7cf9 }, { 0xa438, 0x0263 },
+ { 0xa438, 0x8eee }, { 0xa438, 0x8fea }, { 0xa438, 0x00bf },
+ { 0xa438, 0x7c02 }, { 0xa438, 0x027c }, { 0xa438, 0xf9fc },
+ { 0xa438, 0xef94 }, { 0xa438, 0xfc04 }, { 0xa438, 0xf8f9 },
+ { 0xa438, 0xfbef }, { 0xa438, 0x79fb }, { 0xa438, 0xe080 },
+ { 0xa438, 0x15ac }, { 0xa438, 0x2103 }, { 0xa438, 0xaf8b },
+ { 0xa438, 0x70ee }, { 0xa438, 0x8888 }, { 0xa438, 0x00ee },
+ { 0xa438, 0x888a }, { 0xa438, 0x00ee }, { 0xa438, 0x888b },
+ { 0xa438, 0x00bf }, { 0xa438, 0x7bd8 }, { 0xa438, 0x027d },
+ { 0xa438, 0x02bf }, { 0xa438, 0x6000 }, { 0xa438, 0xd788 },
+ { 0xa438, 0x881f }, { 0xa438, 0x44d4 }, { 0xa438, 0x000c },
+ { 0xa438, 0x0273 }, { 0xa438, 0x3b02 }, { 0xa438, 0x7fa9 },
+ { 0xa438, 0xac28 }, { 0xa438, 0x05ac }, { 0xa438, 0x290d },
+ { 0xa438, 0xae18 }, { 0xa438, 0xe188 }, { 0xa438, 0x98bf },
+ { 0xa438, 0x7be1 }, { 0xa438, 0x027d }, { 0xa438, 0x25ae },
+ { 0xa438, 0x18e1 }, { 0xa438, 0x8898 }, { 0xa438, 0x0d11 },
+ { 0xa438, 0xbf7b }, { 0xa438, 0xe102 }, { 0xa438, 0x7d25 },
+ { 0xa438, 0xae0b }, { 0xa438, 0xe188 }, { 0xa438, 0x980d },
+ { 0xa438, 0x12bf }, { 0xa438, 0x7be1 }, { 0xa438, 0x027d },
+ { 0xa438, 0x25bf }, { 0xa438, 0x88a0 }, { 0xa438, 0xda19 },
+ { 0xa438, 0xdb19 }, { 0xa438, 0xd819 }, { 0xa438, 0xd91f },
+ { 0xa438, 0x77bf }, { 0xa438, 0x88b1 }, { 0xa438, 0xde19 },
+ { 0xa438, 0xdf19 }, { 0xa438, 0xdc19 }, { 0xa438, 0xdd19 },
+ { 0xa438, 0x17a7 }, { 0xa438, 0x0004 }, { 0xa438, 0xf302 },
+ { 0xa438, 0x63cd }, { 0xa438, 0xee8f }, { 0xa438, 0xea01 },
+ { 0xa438, 0xe080 }, { 0xa438, 0x16ad }, { 0xa438, 0x2319 },
+ { 0xa438, 0xee88 }, { 0xa438, 0x8800 }, { 0xa438, 0xee88 },
+ { 0xa438, 0x8a00 }, { 0xa438, 0xee88 }, { 0xa438, 0x8b00 },
+ { 0xa438, 0xbf8e }, { 0xa438, 0x4402 }, { 0xa438, 0x7d02 },
+ { 0xa438, 0x0263 }, { 0xa438, 0xcdee }, { 0xa438, 0x8fea },
+ { 0xa438, 0x0102 }, { 0xa438, 0x70de }, { 0xa438, 0xbf7c },
+ { 0xa438, 0x0202 }, { 0xa438, 0x7d02 }, { 0xa438, 0xffef },
+ { 0xa438, 0x97ff }, { 0xa438, 0xfdfc }, { 0xa438, 0x04f8 },
+ { 0xa438, 0xf9fa }, { 0xa438, 0xef69 }, { 0xa438, 0xfae0 },
+ { 0xa438, 0x888a }, { 0xa438, 0xe188 }, { 0xa438, 0x8b14 },
+ { 0xa438, 0xe488 }, { 0xa438, 0x8ae5 }, { 0xa438, 0x888b },
+ { 0xa438, 0xbf88 }, { 0xa438, 0x94d8 }, { 0xa438, 0x19d9 },
+ { 0xa438, 0xef64 }, { 0xa438, 0xe088 }, { 0xa438, 0x8ae1 },
+ { 0xa438, 0x888b }, { 0xa438, 0x1b46 }, { 0xa438, 0x9f30 },
+ { 0xa438, 0x1f44 }, { 0xa438, 0xe488 }, { 0xa438, 0x8ae5 },
+ { 0xa438, 0x888b }, { 0xa438, 0xe080 }, { 0xa438, 0x15ad },
+ { 0xa438, 0x211a }, { 0xa438, 0x0260 }, { 0xa438, 0xece0 },
+ { 0xa438, 0x8016 }, { 0xa438, 0xad23 }, { 0xa438, 0x1602 },
+ { 0xa438, 0x7c86 }, { 0xa438, 0xef47 }, { 0xa438, 0xe48f },
+ { 0xa438, 0xe9e5 }, { 0xa438, 0x8fe8 }, { 0xa438, 0xee8f },
+ { 0xa438, 0xea02 }, { 0xa438, 0xae0b }, { 0xa438, 0x028c },
+ { 0xa438, 0x2eae }, { 0xa438, 0x0602 }, { 0xa438, 0x8bfe },
+ { 0xa438, 0x0270 }, { 0xa438, 0xdefe }, { 0xa438, 0xef96 },
+ { 0xa438, 0xfefd }, { 0xa438, 0xfc04 }, { 0xa438, 0xf8e1 },
+ { 0xa438, 0x8888 }, { 0xa438, 0x11e5 }, { 0xa438, 0x8888 },
+ { 0xa438, 0xad2a }, { 0xa438, 0x04ee }, { 0xa438, 0x8888 },
+ { 0xa438, 0x00fc }, { 0xa438, 0x04f8 }, { 0xa438, 0xfafb },
+ { 0xa438, 0xe08f }, { 0xa438, 0xe9e1 }, { 0xa438, 0x8fe8 },
+ { 0xa438, 0xef64 }, { 0xa438, 0x1f00 }, { 0xa438, 0xe18f },
+ { 0xa438, 0xe6ef }, { 0xa438, 0x7402 }, { 0xa438, 0x7ca1 },
+ { 0xa438, 0xad50 }, { 0xa438, 0x0302 }, { 0xa438, 0x8c2e },
+ { 0xa438, 0xfffe }, { 0xa438, 0xfc04 }, { 0xa438, 0xf8fa },
+ { 0xa438, 0xef69 }, { 0xa438, 0xfbbf }, { 0xa438, 0x7bf3 },
+ { 0xa438, 0x027d }, { 0xa438, 0x44ac }, { 0xa438, 0x284c },
+ { 0xa438, 0x0264 }, { 0xa438, 0x1cbf }, { 0xa438, 0x8e47 },
+ { 0xa438, 0x027d }, { 0xa438, 0x02bf }, { 0xa438, 0x8e4a },
+ { 0xa438, 0x027d }, { 0xa438, 0x02d1 }, { 0xa438, 0x43b1 },
+ { 0xa438, 0xfebf }, { 0xa438, 0x7aa6 }, { 0xa438, 0x027c },
+ { 0xa438, 0xf9bf }, { 0xa438, 0x7aa3 }, { 0xa438, 0x027c },
+ { 0xa438, 0xf9bf }, { 0xa438, 0x7aa9 }, { 0xa438, 0x027c },
+ { 0xa438, 0xf9bf }, { 0xa438, 0x7aac }, { 0xa438, 0x027d },
+ { 0xa438, 0x02d1 }, { 0xa438, 0x80e0 }, { 0xa438, 0x8888 },
+ { 0xa438, 0x100e }, { 0xa438, 0x11b0 }, { 0xa438, 0xfcbf },
+ { 0xa438, 0x7a94 }, { 0xa438, 0x027d }, { 0xa438, 0x2502 },
+ { 0xa438, 0x7c86 }, { 0xa438, 0xef47 }, { 0xa438, 0xe48f },
+ { 0xa438, 0xe9e5 }, { 0xa438, 0x8fe8 }, { 0xa438, 0xee8f },
+ { 0xa438, 0xea03 }, { 0xa438, 0xae07 }, { 0xa438, 0xee8f },
+ { 0xa438, 0xea01 }, { 0xa438, 0x0270 }, { 0xa438, 0xdeff },
+ { 0xa438, 0xef96 }, { 0xa438, 0xfefc }, { 0xa438, 0x04f8 },
+ { 0xa438, 0xf9fa }, { 0xa438, 0xfbef }, { 0xa438, 0x79fb },
+ { 0xa438, 0xbf7a }, { 0xa438, 0x9402 }, { 0xa438, 0x7d44 },
+ { 0xa438, 0xef21 }, { 0xa438, 0xbf7a }, { 0xa438, 0xb802 },
+ { 0xa438, 0x7d44 }, { 0xa438, 0x1f21 }, { 0xa438, 0x9e19 },
+ { 0xa438, 0xe08f }, { 0xa438, 0xe9e1 }, { 0xa438, 0x8fe8 },
+ { 0xa438, 0xef64 }, { 0xa438, 0x1f00 }, { 0xa438, 0xe18f },
+ { 0xa438, 0xe4ef }, { 0xa438, 0x7402 }, { 0xa438, 0x7ca1 },
+ { 0xa438, 0xad50 }, { 0xa438, 0x3dee }, { 0xa438, 0x8fe7 },
+ { 0xa438, 0x01bf }, { 0xa438, 0x7a94 }, { 0xa438, 0x027c },
+ { 0xa438, 0xf9bf }, { 0xa438, 0x7aa6 }, { 0xa438, 0x027c },
+ { 0xa438, 0xf9bf }, { 0xa438, 0x7aa3 }, { 0xa438, 0x027c },
+ { 0xa438, 0xf9bf }, { 0xa438, 0x7aa9 }, { 0xa438, 0x027c },
+ { 0xa438, 0xf9bf }, { 0xa438, 0x7aac }, { 0xa438, 0x027d },
+ { 0xa438, 0x02bf }, { 0xa438, 0x8e47 }, { 0xa438, 0x027c },
+ { 0xa438, 0xf9bf }, { 0xa438, 0x8e4a }, { 0xa438, 0x027c },
+ { 0xa438, 0xf902 }, { 0xa438, 0x7c86 }, { 0xa438, 0xef47 },
+ { 0xa438, 0xe48f }, { 0xa438, 0xe9e5 }, { 0xa438, 0x8fe8 },
+ { 0xa438, 0xee8f }, { 0xa438, 0xea04 }, { 0xa438, 0xffef },
+ { 0xa438, 0x97ff }, { 0xa438, 0xfefd }, { 0xa438, 0xfc04 },
+ { 0xa438, 0xf8fa }, { 0xa438, 0xfbe0 }, { 0xa438, 0x8fe9 },
+ { 0xa438, 0xe18f }, { 0xa438, 0xe8ef }, { 0xa438, 0x641f },
+ { 0xa438, 0x00e1 }, { 0xa438, 0x8fe5 }, { 0xa438, 0xef74 },
+ { 0xa438, 0x027c }, { 0xa438, 0xa1ad }, { 0xa438, 0x500d },
+ { 0xa438, 0x0263 }, { 0xa438, 0x8e02 }, { 0xa438, 0x8bfe },
+ { 0xa438, 0xee8f }, { 0xa438, 0xea01 }, { 0xa438, 0x0270 },
+ { 0xa438, 0xdeff }, { 0xa438, 0xfefc }, { 0xa438, 0x04e3 },
+ { 0xa438, 0x8fd8 }, { 0xa438, 0xe787 }, { 0xa438, 0x75e4 },
+ { 0xa438, 0x8fe1 }, { 0xa438, 0xe58f }, { 0xa438, 0xe2bf },
+ { 0xa438, 0x8fd9 }, { 0xa438, 0xef32 }, { 0xa438, 0x0c31 },
+ { 0xa438, 0x1a93 }, { 0xa438, 0xdc19 }, { 0xa438, 0xdd02 },
+ { 0xa438, 0x7fa9 }, { 0xa438, 0xac2a }, { 0xa438, 0x18e0 },
+ { 0xa438, 0x8fe1 }, { 0xa438, 0xe18f }, { 0xa438, 0xe2ef },
+ { 0xa438, 0x74e1 }, { 0xa438, 0x8775 }, { 0xa438, 0x1f00 },
+ { 0xa438, 0xef64 }, { 0xa438, 0xe18f }, { 0xa438, 0xd8e5 },
+ { 0xa438, 0x8775 }, { 0xa438, 0xaf4d }, { 0xa438, 0x72bf },
+ { 0xa438, 0x7b3c }, { 0xa438, 0xef32 }, { 0xa438, 0x4b03 },
+ { 0xa438, 0x1a93 }, { 0xa438, 0x027d }, { 0xa438, 0x44ef },
+ { 0xa438, 0x64e1 }, { 0xa438, 0x8fff }, { 0xa438, 0x1f00 },
+ { 0xa438, 0xef74 }, { 0xa438, 0x1b67 }, { 0xa438, 0xac4f },
+ { 0xa438, 0xcee0 }, { 0xa438, 0x8ffd }, { 0xa438, 0xe18f },
+ { 0xa438, 0xfeef }, { 0xa438, 0x64e0 }, { 0xa438, 0x8fe1 },
+ { 0xa438, 0xe18f }, { 0xa438, 0xe2ef }, { 0xa438, 0x7402 },
+ { 0xa438, 0x7c53 }, { 0xa438, 0xac50 }, { 0xa438, 0x02ae },
+ { 0xa438, 0xb6e1 }, { 0xa438, 0x8775 }, { 0xa438, 0x1f00 },
+ { 0xa438, 0xef64 }, { 0xa438, 0xe18f }, { 0xa438, 0xfcef },
+ { 0xa438, 0x711c }, { 0xa438, 0x670d }, { 0xa438, 0x67ef },
+ { 0xa438, 0x46e5 }, { 0xa438, 0x8775 }, { 0xa438, 0xef32 },
+ { 0xa438, 0xd101 }, { 0xa438, 0xa300 }, { 0xa438, 0x02ae },
+ { 0xa438, 0x050c }, { 0xa438, 0x1183 }, { 0xa438, 0xaef6 },
+ { 0xa438, 0xe08f }, { 0xa438, 0xe31e }, { 0xa438, 0x10e5 },
+ { 0xa438, 0x8fe3 }, { 0xa438, 0xae89 }, { 0xa438, 0xe287 },
+ { 0xa438, 0x75e6 }, { 0xa438, 0x8fd8 }, { 0xa438, 0x1f22 },
+ { 0xa438, 0xaf4d }, { 0xa438, 0x42f8 }, { 0xa438, 0xf9ef },
+ { 0xa438, 0x59fa }, { 0xa438, 0xfbbf }, { 0xa438, 0x8fee },
+ { 0xa438, 0x027f }, { 0xa438, 0xa90d }, { 0xa438, 0x1149 },
+ { 0xa438, 0x041a }, { 0xa438, 0x91d7 }, { 0xa438, 0x8df3 },
+ { 0xa438, 0xd68e }, { 0xa438, 0x2302 }, { 0xa438, 0x72aa },
+ { 0xa438, 0xfffe }, { 0xa438, 0xef95 }, { 0xa438, 0xfdfc },
+ { 0xa438, 0x0400 }, { 0xa438, 0x7591 }, { 0xa438, 0x0275 },
+ { 0xa438, 0x4404 }, { 0xa438, 0x758e }, { 0xa438, 0x2675 },
+ { 0xa438, 0x4100 }, { 0xa438, 0x8e26 }, { 0xa438, 0x028e },
+ { 0xa438, 0x2304 }, { 0xa438, 0x759d }, { 0xa438, 0x2675 },
+ { 0xa438, 0x4700 }, { 0xa438, 0x8e32 }, { 0xa438, 0x028e },
+ { 0xa438, 0x2f04 }, { 0xa438, 0x8e2c }, { 0xa438, 0x268e },
+ { 0xa438, 0x2900 }, { 0xa438, 0x8e3e }, { 0xa438, 0x028e },
+ { 0xa438, 0x3b04 }, { 0xa438, 0x8e38 }, { 0xa438, 0x268e },
+ { 0xa438, 0x35fe }, { 0xa438, 0xad96 }, { 0xa438, 0xdcad },
+ { 0xa438, 0x96ba }, { 0xa438, 0xad96 }, { 0xa438, 0x98ad },
+ { 0xa438, 0x9676 }, { 0xa438, 0xad98 }, { 0xa438, 0x54ad },
+ { 0xa438, 0x9876 }, { 0xa438, 0xae38 }, { 0xa438, 0x54ae },
+ { 0xa438, 0x38fe }, { 0xa438, 0xae3a }, { 0xa438, 0xdcae },
+ { 0xa438, 0x3abb }, { 0xa438, 0xbf14 }, { 0xa438, 0x99bd },
+ { 0xa438, 0xe0cc }, { 0xa438, 0xbdc8 }, { 0xa438, 0xddbd },
+ { 0xa438, 0xc800 }, { 0xa436, 0xb85e }, { 0xa438, 0x4f9a },
+ { 0xa436, 0xb860 }, { 0xa438, 0x40cf }, { 0xa436, 0xb862 },
+ { 0xa438, 0x6829 }, { 0xa436, 0xb864 }, { 0xa438, 0x5972 },
+ { 0xa436, 0xb886 }, { 0xa438, 0x5941 }, { 0xa436, 0xb888 },
+ { 0xa438, 0x636b }, { 0xa436, 0xb88a }, { 0xa438, 0x4d6b },
+ { 0xa436, 0xb88c }, { 0xa438, 0x4d40 }, { 0xa436, 0xb838 },
+ { 0xa438, 0x00ff }, { 0xb820, 0x0010 }, { 0xa436, 0x8608 },
+ { 0xa438, 0xaf86 }, { 0xa438, 0xdaaf }, { 0xa438, 0x894c },
+ { 0xa438, 0xaf8a }, { 0xa438, 0xf8af }, { 0xa438, 0x8bf3 },
+ { 0xa438, 0xaf8b }, { 0xa438, 0xf3af }, { 0xa438, 0x8bf3 },
+ { 0xa438, 0xaf8b }, { 0xa438, 0xf3af }, { 0xa438, 0x8bf3 },
+ { 0xa438, 0x006f }, { 0xa438, 0x4a03 }, { 0xa438, 0x6f47 },
+ { 0xa438, 0x266f }, { 0xa438, 0x5900 }, { 0xa438, 0x6f4d },
+ { 0xa438, 0x016f }, { 0xa438, 0x5004 }, { 0xa438, 0x6f56 },
+ { 0xa438, 0x056f }, { 0xa438, 0x5f06 }, { 0xa438, 0x6f5c },
+ { 0xa438, 0x2774 }, { 0xa438, 0x7800 }, { 0xa438, 0x6f68 },
+ { 0xa438, 0x246f }, { 0xa438, 0x6b20 }, { 0xa438, 0x6f6e },
+ { 0xa438, 0x206f }, { 0xa438, 0x7410 }, { 0xa438, 0x7469 },
+ { 0xa438, 0x1074 }, { 0xa438, 0x6c10 }, { 0xa438, 0x746f },
+ { 0xa438, 0x1074 }, { 0xa438, 0x7225 }, { 0xa438, 0x8bfc },
+ { 0xa438, 0x008c }, { 0xa438, 0x0802 }, { 0xa438, 0x8c02 },
+ { 0xa438, 0x038b }, { 0xa438, 0xff04 }, { 0xa438, 0x6eed },
+ { 0xa438, 0x278c }, { 0xa438, 0x0520 }, { 0xa438, 0x74da },
+ { 0xa438, 0x2074 }, { 0xa438, 0xdd20 }, { 0xa438, 0x74e0 },
+ { 0xa438, 0x0074 }, { 0xa438, 0xe300 }, { 0xa438, 0x6ef3 },
+ { 0xa438, 0x006e }, { 0xa438, 0xf600 }, { 0xa438, 0x6ef9 },
+ { 0xa438, 0x006e }, { 0xa438, 0xfc00 }, { 0xa438, 0x6eff },
+ { 0xa438, 0x006f }, { 0xa438, 0x0200 }, { 0xa438, 0x6f05 },
+ { 0xa438, 0x026f }, { 0xa438, 0x0802 }, { 0xa438, 0x6f0b },
+ { 0xa438, 0x026f }, { 0xa438, 0x0e02 }, { 0xa438, 0x6f11 },
+ { 0xa438, 0x026f }, { 0xa438, 0x1402 }, { 0xa438, 0x6f17 },
+ { 0xa438, 0x226f }, { 0xa438, 0x1a00 }, { 0xa438, 0x723e },
+ { 0xa438, 0x016e }, { 0xa438, 0xed24 }, { 0xa438, 0x6f50 },
+ { 0xa438, 0x0072 }, { 0xa438, 0x4701 }, { 0xa438, 0x724a },
+ { 0xa438, 0x0272 }, { 0xa438, 0x4d23 }, { 0xa438, 0x7250 },
+ { 0xa438, 0x1074 }, { 0xa438, 0x6910 }, { 0xa438, 0x746c },
+ { 0xa438, 0x1074 }, { 0xa438, 0x6f00 }, { 0xa438, 0x7472 },
+ { 0xa438, 0x158c }, { 0xa438, 0x0b15 }, { 0xa438, 0x8c0e },
+ { 0xa438, 0x158c }, { 0xa438, 0x1105 }, { 0xa438, 0x8c14 },
+ { 0xa438, 0x006f }, { 0xa438, 0x4a03 }, { 0xa438, 0x6f47 },
+ { 0xa438, 0x266f }, { 0xa438, 0x5900 }, { 0xa438, 0x731f },
+ { 0xa438, 0x0273 }, { 0xa438, 0x2203 }, { 0xa438, 0x8c08 },
+ { 0xa438, 0xee84 }, { 0xa438, 0x7100 }, { 0xa438, 0x0286 },
+ { 0xa438, 0xece0 }, { 0xa438, 0x8043 }, { 0xa438, 0xf626 },
+ { 0xa438, 0xe480 }, { 0xa438, 0x43af }, { 0xa438, 0x6611 },
+ { 0xa438, 0xf8e0 }, { 0xa438, 0x8012 }, { 0xa438, 0xac26 },
+ { 0xa438, 0x03af }, { 0xa438, 0x86ff }, { 0xa438, 0x0287 },
+ { 0xa438, 0x0102 }, { 0xa438, 0x8906 }, { 0xa438, 0x0289 },
+ { 0xa438, 0x29fc }, { 0xa438, 0x04f8 }, { 0xa438, 0xf9ef },
+ { 0xa438, 0x59f9 }, { 0xa438, 0xfaee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x00d6 }, { 0xa438, 0x008f }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8fe7 },
+ { 0xa438, 0xe58f }, { 0xa438, 0xe8ae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8fe7 }, { 0xa438, 0xe18f }, { 0xa438, 0xe8ee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x01d6 }, { 0xa438, 0x00c0 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x00d6 }, { 0xa438, 0x0090 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8fe9 },
+ { 0xa438, 0xe58f }, { 0xa438, 0xeaae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8fe9 }, { 0xa438, 0xe18f }, { 0xa438, 0xeaee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x01d6 }, { 0xa438, 0x00c1 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x00d6 }, { 0xa438, 0x0091 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8feb },
+ { 0xa438, 0xe58f }, { 0xa438, 0xecae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8feb }, { 0xa438, 0xe18f }, { 0xa438, 0xecee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x01d6 }, { 0xa438, 0x00c2 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x01d6 }, { 0xa438, 0x008f }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8fed },
+ { 0xa438, 0xe58f }, { 0xa438, 0xeeae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8fed }, { 0xa438, 0xe18f }, { 0xa438, 0xeeee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x02d6 }, { 0xa438, 0x00c0 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x01d6 }, { 0xa438, 0x0090 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8fef },
+ { 0xa438, 0xe58f }, { 0xa438, 0xf0ae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8fef }, { 0xa438, 0xe18f }, { 0xa438, 0xf0ee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x02d6 }, { 0xa438, 0x00c1 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x01d6 }, { 0xa438, 0x0091 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8ff1 },
+ { 0xa438, 0xe58f }, { 0xa438, 0xf2ae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8ff1 }, { 0xa438, 0xe18f }, { 0xa438, 0xf2ee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x02d6 }, { 0xa438, 0x00c2 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x02d6 }, { 0xa438, 0x008f }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8ff3 },
+ { 0xa438, 0xe58f }, { 0xa438, 0xf4ae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8ff3 }, { 0xa438, 0xe18f }, { 0xa438, 0xf4ee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x04d6 }, { 0xa438, 0x00c0 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x02d6 }, { 0xa438, 0x0090 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8ff5 },
+ { 0xa438, 0xe58f }, { 0xa438, 0xf6ae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8ff5 }, { 0xa438, 0xe18f }, { 0xa438, 0xf6ee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x04d6 }, { 0xa438, 0x00c1 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x02d6 }, { 0xa438, 0x0091 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8ff7 },
+ { 0xa438, 0xe58f }, { 0xa438, 0xf8ae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8ff7 }, { 0xa438, 0xe18f }, { 0xa438, 0xf8ee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x04d6 }, { 0xa438, 0x00c2 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x03d6 }, { 0xa438, 0x008f }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8ff9 },
+ { 0xa438, 0xe58f }, { 0xa438, 0xfaae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8ff9 }, { 0xa438, 0xe18f }, { 0xa438, 0xfaee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x08d6 }, { 0xa438, 0x00c0 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x03d6 }, { 0xa438, 0x0090 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8ffb },
+ { 0xa438, 0xe58f }, { 0xa438, 0xfcae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8ffb }, { 0xa438, 0xe18f }, { 0xa438, 0xfcee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x08d6 }, { 0xa438, 0x00c1 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71ee }, { 0xa438, 0x8476 },
+ { 0xa438, 0x03d6 }, { 0xa438, 0x0091 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x53ef }, { 0xa438, 0x643e }, { 0xa438, 0x1200 },
+ { 0xa438, 0xac4f }, { 0xa438, 0x08e4 }, { 0xa438, 0x8ffd },
+ { 0xa438, 0xe58f }, { 0xa438, 0xfeae }, { 0xa438, 0x06e0 },
+ { 0xa438, 0x8ffd }, { 0xa438, 0xe18f }, { 0xa438, 0xfeee },
+ { 0xa438, 0x8476 }, { 0xa438, 0x08d6 }, { 0xa438, 0x00c2 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71fe }, { 0xa438, 0xfdef },
+ { 0xa438, 0x95fd }, { 0xa438, 0xfc04 }, { 0xa438, 0xf8f9 },
+ { 0xa438, 0xfad4 }, { 0xa438, 0x0400 }, { 0xa438, 0xd600 },
+ { 0xa438, 0x0dd3 }, { 0xa438, 0x0fe7 }, { 0xa438, 0x8476 },
+ { 0xa438, 0x0266 }, { 0xa438, 0x71d4 }, { 0xa438, 0x1400 },
+ { 0xa438, 0xd600 }, { 0xa438, 0x0dd3 }, { 0xa438, 0x0fe7 },
+ { 0xa438, 0x8476 }, { 0xa438, 0x0266 }, { 0xa438, 0x71fe },
+ { 0xa438, 0xfdfc }, { 0xa438, 0x04f8 }, { 0xa438, 0xf9fa },
+ { 0xa438, 0xd410 }, { 0xa438, 0x00d6 }, { 0xa438, 0x000d },
+ { 0xa438, 0xd30f }, { 0xa438, 0xe784 }, { 0xa438, 0x7602 },
+ { 0xa438, 0x6671 }, { 0xa438, 0xd400 }, { 0xa438, 0x00d6 },
+ { 0xa438, 0x000d }, { 0xa438, 0xd30f }, { 0xa438, 0xe784 },
+ { 0xa438, 0x7602 }, { 0xa438, 0x6671 }, { 0xa438, 0xfefd },
+ { 0xa438, 0xfc04 }, { 0xa438, 0xe080 }, { 0xa438, 0x4fac },
+ { 0xa438, 0x2317 }, { 0xa438, 0xe080 }, { 0xa438, 0x44ad },
+ { 0xa438, 0x231a }, { 0xa438, 0x0289 }, { 0xa438, 0x75e0 },
+ { 0xa438, 0x8044 }, { 0xa438, 0xac23 }, { 0xa438, 0x11bf },
+ { 0xa438, 0x6ecf }, { 0xa438, 0x0276 }, { 0xa438, 0x74ae },
+ { 0xa438, 0x0902 }, { 0xa438, 0x8adb }, { 0xa438, 0x021f },
+ { 0xa438, 0xe702 }, { 0xa438, 0x1fbb }, { 0xa438, 0xaf1f },
+ { 0xa438, 0x95f8 }, { 0xa438, 0xf9ef }, { 0xa438, 0x59f9 },
+ { 0xa438, 0xfafb }, { 0xa438, 0xe080 }, { 0xa438, 0x12ac },
+ { 0xa438, 0x2303 }, { 0xa438, 0xaf8a }, { 0xa438, 0xd0d4 },
+ { 0xa438, 0x0120 }, { 0xa438, 0xd600 }, { 0xa438, 0x10d2 },
+ { 0xa438, 0x0fe6 }, { 0xa438, 0x8476 }, { 0xa438, 0x0266 },
+ { 0xa438, 0x71ee }, { 0xa438, 0x846f }, { 0xa438, 0x00d4 },
+ { 0xa438, 0x000f }, { 0xa438, 0xbf72 }, { 0xa438, 0x9e02 },
+ { 0xa438, 0x7697 }, { 0xa438, 0x0275 }, { 0xa438, 0xbeef },
+ { 0xa438, 0x47e4 }, { 0xa438, 0x8474 }, { 0xa438, 0xe584 },
+ { 0xa438, 0x75bf }, { 0xa438, 0x729b }, { 0xa438, 0x0276 },
+ { 0xa438, 0xb6e5 }, { 0xa438, 0x846f }, { 0xa438, 0xef31 },
+ { 0xa438, 0xbf6e }, { 0xa438, 0x0602 }, { 0xa438, 0x76b6 },
+ { 0xa438, 0xef64 }, { 0xa438, 0xbf6e }, { 0xa438, 0x0902 },
+ { 0xa438, 0x76b6 }, { 0xa438, 0x1e64 }, { 0xa438, 0xbf6e },
+ { 0xa438, 0x0f02 }, { 0xa438, 0x76b6 }, { 0xa438, 0x1e64 },
+ { 0xa438, 0xac40 }, { 0xa438, 0x05a3 }, { 0xa438, 0x0f0c },
+ { 0xa438, 0xae26 }, { 0xa438, 0xa303 }, { 0xa438, 0x02ae },
+ { 0xa438, 0x21a3 }, { 0xa438, 0x0c02 }, { 0xa438, 0xae1c },
+ { 0xa438, 0xe084 }, { 0xa438, 0x74e1 }, { 0xa438, 0x8475 },
+ { 0xa438, 0xef64 }, { 0xa438, 0xd000 }, { 0xa438, 0xd196 },
+ { 0xa438, 0xef74 }, { 0xa438, 0x0275 }, { 0xa438, 0xd9ad },
+ { 0xa438, 0x50b7 }, { 0xa438, 0xe083 }, { 0xa438, 0xecf7 },
+ { 0xa438, 0x23e4 }, { 0xa438, 0x83ec }, { 0xa438, 0xbf72 },
+ { 0xa438, 0x9e02 }, { 0xa438, 0x766b }, { 0xa438, 0x0287 },
+ { 0xa438, 0x0102 }, { 0xa438, 0x8906 }, { 0xa438, 0xee83 },
+ { 0xa438, 0xe800 }, { 0xa438, 0xbf72 }, { 0xa438, 0x6b02 },
+ { 0xa438, 0x766b }, { 0xa438, 0xbf72 }, { 0xa438, 0x6e02 },
+ { 0xa438, 0x766b }, { 0xa438, 0xbf72 }, { 0xa438, 0x7102 },
+ { 0xa438, 0x766b }, { 0xa438, 0xbf72 }, { 0xa438, 0x7402 },
+ { 0xa438, 0x766b }, { 0xa438, 0xbf72 }, { 0xa438, 0x7702 },
+ { 0xa438, 0x766b }, { 0xa438, 0xbf72 }, { 0xa438, 0x7a02 },
+ { 0xa438, 0x766b }, { 0xa438, 0xd400 }, { 0xa438, 0x0fbf },
+ { 0xa438, 0x7295 }, { 0xa438, 0x0276 }, { 0xa438, 0x97d7 },
+ { 0xa438, 0x0400 }, { 0xa438, 0xbf6e }, { 0xa438, 0x0602 },
+ { 0xa438, 0x76b6 }, { 0xa438, 0xef64 }, { 0xa438, 0xbf6e },
+ { 0xa438, 0x0902 }, { 0xa438, 0x76b6 }, { 0xa438, 0x1e64 },
+ { 0xa438, 0xbf6e }, { 0xa438, 0x0f02 }, { 0xa438, 0x76b6 },
+ { 0xa438, 0x1e64 }, { 0xa438, 0xac40 }, { 0xa438, 0x0fbf },
+ { 0xa438, 0x7298 }, { 0xa438, 0x0276 }, { 0xa438, 0xb6e5 },
+ { 0xa438, 0x83e8 }, { 0xa438, 0xa10f }, { 0xa438, 0x28af },
+ { 0xa438, 0x8a95 }, { 0xa438, 0xbf8b }, { 0xa438, 0xf302 },
+ { 0xa438, 0x76b6 }, { 0xa438, 0xac28 }, { 0xa438, 0x02ae },
+ { 0xa438, 0x0bbf }, { 0xa438, 0x8bf9 }, { 0xa438, 0x0276 },
+ { 0xa438, 0xb6e5 }, { 0xa438, 0x83e8 }, { 0xa438, 0xae09 },
+ { 0xa438, 0xbf8b }, { 0xa438, 0xf602 }, { 0xa438, 0x76b6 },
+ { 0xa438, 0xe583 }, { 0xa438, 0xe8a1 }, { 0xa438, 0x0303 },
+ { 0xa438, 0xaf8a }, { 0xa438, 0x95b7 }, { 0xa438, 0xafe2 },
+ { 0xa438, 0x83ec }, { 0xa438, 0xf735 }, { 0xa438, 0xe683 },
+ { 0xa438, 0xecbf }, { 0xa438, 0x7295 }, { 0xa438, 0x0276 },
+ { 0xa438, 0x6bbf }, { 0xa438, 0x726b }, { 0xa438, 0x0276 },
+ { 0xa438, 0x74bf }, { 0xa438, 0x726e }, { 0xa438, 0x0276 },
+ { 0xa438, 0x74bf }, { 0xa438, 0x7271 }, { 0xa438, 0x0276 },
+ { 0xa438, 0x74bf }, { 0xa438, 0x7274 }, { 0xa438, 0x0276 },
+ { 0xa438, 0x74bf }, { 0xa438, 0x7277 }, { 0xa438, 0x0276 },
+ { 0xa438, 0x74bf }, { 0xa438, 0x727a }, { 0xa438, 0x0276 },
+ { 0xa438, 0x7402 }, { 0xa438, 0x8929 }, { 0xa438, 0xd401 },
+ { 0xa438, 0x28d6 }, { 0xa438, 0x0010 }, { 0xa438, 0xd20f },
+ { 0xa438, 0xe684 }, { 0xa438, 0x7602 }, { 0xa438, 0x6671 },
+ { 0xa438, 0x021f }, { 0xa438, 0xbbff }, { 0xa438, 0xfefd },
+ { 0xa438, 0xef95 }, { 0xa438, 0xfdfc }, { 0xa438, 0x04f8 },
+ { 0xa438, 0xf9ef }, { 0xa438, 0x59f9 }, { 0xa438, 0xe080 },
+ { 0xa438, 0x12ad }, { 0xa438, 0x230c }, { 0xa438, 0xbf72 },
+ { 0xa438, 0x9e02 }, { 0xa438, 0x766b }, { 0xa438, 0xbf72 },
+ { 0xa438, 0x9502 }, { 0xa438, 0x766b }, { 0xa438, 0xfdef },
+ { 0xa438, 0x95fd }, { 0xa438, 0xfc04 }, { 0xa438, 0xbf6e },
+ { 0xa438, 0x0602 }, { 0xa438, 0x76b6 }, { 0xa438, 0xef64 },
+ { 0xa438, 0xbf6e }, { 0xa438, 0x0902 }, { 0xa438, 0x76b6 },
+ { 0xa438, 0x1e64 }, { 0xa438, 0xbf6e }, { 0xa438, 0x0f02 },
+ { 0xa438, 0x76b6 }, { 0xa438, 0x1e64 }, { 0xa438, 0xac40 },
+ { 0xa438, 0x0ebf }, { 0xa438, 0x7298 }, { 0xa438, 0x0276 },
+ { 0xa438, 0xb6e5 }, { 0xa438, 0x8478 }, { 0xa438, 0xa10f },
+ { 0xa438, 0x26ae }, { 0xa438, 0x47bf }, { 0xa438, 0x8bf3 },
+ { 0xa438, 0x0276 }, { 0xa438, 0xb6ac }, { 0xa438, 0x2802 },
+ { 0xa438, 0xae0b }, { 0xa438, 0xbf8b }, { 0xa438, 0xf902 },
+ { 0xa438, 0x76b6 }, { 0xa438, 0xe584 }, { 0xa438, 0x78ae },
+ { 0xa438, 0x09bf }, { 0xa438, 0x8bf6 }, { 0xa438, 0x0276 },
+ { 0xa438, 0xb6e5 }, { 0xa438, 0x8478 }, { 0xa438, 0xa103 },
+ { 0xa438, 0x02ae }, { 0xa438, 0x23e0 }, { 0xa438, 0x8474 },
+ { 0xa438, 0xe184 }, { 0xa438, 0x75ef }, { 0xa438, 0x64e0 },
+ { 0xa438, 0x83fc }, { 0xa438, 0xe183 }, { 0xa438, 0xfdef },
+ { 0xa438, 0x7402 }, { 0xa438, 0x75d9 }, { 0xa438, 0xad50 },
+ { 0xa438, 0x0ae0 }, { 0xa438, 0x83ec }, { 0xa438, 0xf721 },
+ { 0xa438, 0xe483 }, { 0xa438, 0xecae }, { 0xa438, 0x03af },
+ { 0xa438, 0x68e4 }, { 0xa438, 0xbf72 }, { 0xa438, 0x9502 },
+ { 0xa438, 0x766b }, { 0xa438, 0xe083 }, { 0xa438, 0xebad },
+ { 0xa438, 0x2170 }, { 0xa438, 0xbf73 }, { 0xa438, 0x7f02 },
+ { 0xa438, 0x766b }, { 0xa438, 0xd700 }, { 0xa438, 0x64bf },
+ { 0xa438, 0x73c4 }, { 0xa438, 0x0276 }, { 0xa438, 0xb6a4 },
+ { 0xa438, 0x0000 }, { 0xa438, 0x02ae }, { 0xa438, 0x0d87 },
+ { 0xa438, 0xa700 }, { 0xa438, 0x00ef }, { 0xa438, 0xe183 },
+ { 0xa438, 0xecf7 }, { 0xa438, 0x2ae5 }, { 0xa438, 0x83ec },
+ { 0xa438, 0xbf73 }, { 0xa438, 0xbe02 }, { 0xa438, 0x766b },
+ { 0xa438, 0xbf73 }, { 0xa438, 0xb802 }, { 0xa438, 0x766b },
+ { 0xa438, 0xbf73 }, { 0xa438, 0xc102 }, { 0xa438, 0x766b },
+ { 0xa438, 0xbf73 }, { 0xa438, 0xbb02 }, { 0xa438, 0x766b },
+ { 0xa438, 0xe084 }, { 0xa438, 0x9ee1 }, { 0xa438, 0x849f },
+ { 0xa438, 0xbf72 }, { 0xa438, 0x7d02 }, { 0xa438, 0x7697 },
+ { 0xa438, 0xbf72 }, { 0xa438, 0x8002 }, { 0xa438, 0x7697 },
+ { 0xa438, 0xbf72 }, { 0xa438, 0x8302 }, { 0xa438, 0x7697 },
+ { 0xa438, 0xbf72 }, { 0xa438, 0x8602 }, { 0xa438, 0x7697 },
+ { 0xa438, 0xbf72 }, { 0xa438, 0x8902 }, { 0xa438, 0x7674 },
+ { 0xa438, 0xbf72 }, { 0xa438, 0x8c02 }, { 0xa438, 0x7674 },
+ { 0xa438, 0xbf72 }, { 0xa438, 0x8f02 }, { 0xa438, 0x7674 },
+ { 0xa438, 0xbf72 }, { 0xa438, 0x9202 }, { 0xa438, 0x7674 },
+ { 0xa438, 0xee84 }, { 0xa438, 0x7700 }, { 0xa438, 0xe080 },
+ { 0xa438, 0x44f6 }, { 0xa438, 0x21e4 }, { 0xa438, 0x8044 },
+ { 0xa438, 0xaf68 }, { 0xa438, 0xe411 }, { 0xa438, 0xd1a4 },
+ { 0xa438, 0x10bc }, { 0xa438, 0x7432 }, { 0xa438, 0xbc74 },
+ { 0xa438, 0xbbbf }, { 0xa438, 0x14cc }, { 0xa438, 0xbfaa },
+ { 0xa438, 0x00bf }, { 0xa438, 0x9055 }, { 0xa438, 0xbf06 },
+ { 0xa438, 0x10bf }, { 0xa438, 0xb876 }, { 0xa438, 0xbe02 },
+ { 0xa438, 0x54be }, { 0xa438, 0x0232 }, { 0xa438, 0xbe02 },
+ { 0xa438, 0x10be }, { 0xa438, 0x0200 }, { 0xa436, 0x8fe7 },
+ { 0xa438, 0x1200 }, { 0xa436, 0x8fe9 }, { 0xa438, 0x1200 },
+ { 0xa436, 0x8feb }, { 0xa438, 0x1200 }, { 0xa436, 0x8fed },
+ { 0xa438, 0x1200 }, { 0xa436, 0x8fef }, { 0xa438, 0x1200 },
+ { 0xa436, 0x8ff1 }, { 0xa438, 0x1200 }, { 0xa436, 0x8ff3 },
+ { 0xa438, 0x1200 }, { 0xa436, 0x8ff5 }, { 0xa438, 0x1200 },
+ { 0xa436, 0x8ff7 }, { 0xa438, 0x1200 }, { 0xa436, 0x8ff9 },
+ { 0xa438, 0x1200 }, { 0xa436, 0x8ffb }, { 0xa438, 0x1200 },
+ { 0xa436, 0x8ffd }, { 0xa438, 0x1200 }, { 0xa436, 0xb818 },
+ { 0xa438, 0x6602 }, { 0xa436, 0xb81a }, { 0xa438, 0x1f75 },
+ { 0xa436, 0xb81c }, { 0xa438, 0x67eb }, { 0xa436, 0xb81e },
+ { 0xa438, 0xffff }, { 0xa436, 0xb850 }, { 0xa438, 0xffff },
+ { 0xa436, 0xb852 }, { 0xa438, 0xffff }, { 0xa436, 0xb878 },
+ { 0xa438, 0xffff }, { 0xa436, 0xb884 }, { 0xa438, 0xffff },
+ { 0xa436, 0xb832 }, { 0xa438, 0x0007 }, { 0xb82e, 0x0000 },
+ { 0xa436, 0x8023 }, { 0xa438, 0x0000 }, { 0xb820, 0x0000 },
+ { 0xb892, 0x0000 }, { 0xb88e, 0xc07c }, { 0xb890, 0x0203 },
+ { 0xb890, 0x0304 }, { 0xb890, 0x0405 }, { 0xb890, 0x0607 },
+ { 0xb890, 0x0809 }, { 0xb890, 0x0b0d }, { 0xb890, 0x0f11 },
+ { 0xb890, 0x1418 }, { 0xb890, 0x1b20 }, { 0xb890, 0x252b },
+ { 0xb890, 0x343e }, { 0xb890, 0x4854 }, { 0xb890, 0x6203 },
+ { 0xb890, 0x0304 }, { 0xb890, 0x0506 }, { 0xb890, 0x080a },
+ { 0xb890, 0x0c0e }, { 0xb890, 0x1216 }, { 0xb890, 0x1b22 },
+ { 0xb890, 0x2a34 }, { 0xb890, 0x404f }, { 0xb890, 0x6171 },
+ { 0xb890, 0x7884 }, { 0xb890, 0x9097 }, { 0xb890, 0x0203 },
+ { 0xb890, 0x0406 }, { 0xb890, 0x080b }, { 0xb890, 0x0e13 },
+ { 0xb890, 0x1820 }, { 0xb890, 0x2a39 }, { 0xb890, 0x4856 },
+ { 0xb890, 0xe060 }, { 0xb890, 0xe050 }, { 0xb890, 0xd080 },
+ { 0xb890, 0x8070 }, { 0xb890, 0x70a0 }, { 0xb890, 0x1000 },
+ { 0xb890, 0x60d0 }, { 0xb890, 0xb010 }, { 0xb890, 0xe0b0 },
+ { 0xb890, 0x80c0 }, { 0xb890, 0xe000 }, { 0xb890, 0x2020 },
+ { 0xb890, 0x1020 }, { 0xb890, 0xe090 }, { 0xb890, 0x80c0 },
+ { 0xb890, 0x3020 }, { 0xb890, 0x00e0 }, { 0xb890, 0x40a0 },
+ { 0xb890, 0xe020 }, { 0xb890, 0x5060 }, { 0xb890, 0xe0d0 },
+ { 0xb890, 0xa000 }, { 0xb890, 0x3030 }, { 0xb890, 0x4070 },
+ { 0xb890, 0xe0e0 }, { 0xb890, 0xd080 }, { 0xb890, 0xa010 },
+ { 0xb890, 0xe040 }, { 0xb890, 0x80b0 }, { 0xb890, 0x50b0 },
+ { 0xb890, 0x2090 }, { 0xb820, 0x0000 }
};
#define MAC_R25_MCU \
Index: sys/dev/pci/pcidevs
===================================================================
RCS file: /cvs/src/sys/dev/pci/pcidevs,v
diff -u -p -u -p -r1.2109 pcidevs
--- sys/dev/pci/pcidevs 21 Aug 2025 02:54:52 -0000 1.2109
+++ sys/dev/pci/pcidevs 18 Sep 2025 01:46:23 -0000
@@ -8964,6 +8964,7 @@ product REALTEK RT8029 0x8029 8029
product REALTEK RT8139D 0x8039 8139D
product REALTEK RTL8125 0x8125 RTL8125
product REALTEK RTL8126 0x8126 RTL8126
+product REALTEK RTL8127 0x8127 RTL8127
product REALTEK RT8129 0x8129 8129
product REALTEK RT8101E 0x8136 8101E
product REALTEK RT8138 0x8138 8138
Support for RTL8127 10Gb Ethernet controller