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psp(4) for AMD EPYC 9005 2/2
Hi,
this adds support for the PSP of AMD EPYC 9005 CPUs to psp(4).
ok?
Take care,
Hans-Joerg
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commit 66bfea3d9f3e2b1920a4662df7624d77ec3ce281
Author: hshoexer <hshoexer@yerbouti.franken.de>
Date: Wed Feb 11 16:42:37 2026 +0100
psp(4): Add support for the PSP found on the AMD EPYC 9005
diff --git a/sys/dev/ic/psp.c b/sys/dev/ic/psp.c
index 5158b4e64b6..1a0cd226f13 100644
--- a/sys/dev/ic/psp.c
+++ b/sys/dev/ic/psp.c
@@ -132,6 +132,12 @@ psp_attach(struct device *parent, struct device *self, void *aux)
sc->sc_reg_cmdresp = PSPV1_REG_CMDRESP;
sc->sc_reg_addrlo = PSPV1_REG_ADDRLO;
sc->sc_reg_addrhi = PSPV1_REG_ADDRHI;
+ } else if (arg->version == 6) {
+ sc->sc_reg_inten = PSPV6_REG_INTEN;
+ sc->sc_reg_intsts = PSPV6_REG_INTSTS;
+ sc->sc_reg_cmdresp = PSPV6_REG_CMDRESP;
+ sc->sc_reg_addrlo = PSPV6_REG_ADDRLO;
+ sc->sc_reg_addrhi = PSPV6_REG_ADDRHI;
} else {
sc->sc_reg_inten = PSP_REG_INTEN;
sc->sc_reg_intsts = PSP_REG_INTSTS;
@@ -976,6 +982,7 @@ struct ucode {
{ 0x17, 0x3, "amdsev/amd_sev_fam17h_model3xh.sbin" },
{ 0x19, 0x0, "amdsev/amd_sev_fam19h_model0xh.sbin" },
{ 0x19, 0x1, "amdsev/amd_sev_fam19h_model1xh.sbin" },
+ { 0x1a, 0x0, "amdsev/amd_sev_fam1ah_model0xh.sbin" },
{ 0, 0, NULL }
};
diff --git a/sys/dev/ic/pspvar.h b/sys/dev/ic/pspvar.h
index 49146436690..359b3158377 100644
--- a/sys/dev/ic/pspvar.h
+++ b/sys/dev/ic/pspvar.h
@@ -26,6 +26,14 @@
#define PSPV1_REG_ADDRHI 0x105e4
#define PSPV1_REG_CAPABILITIES 0x105fc
+/* AMD 1Ah */
+#define PSPV6_REG_INTEN 0x10510
+#define PSPV6_REG_INTSTS 0x10514
+#define PSPV6_REG_CMDRESP 0x10980
+#define PSPV6_REG_ADDRLO 0x109e0
+#define PSPV6_REG_ADDRHI 0x109e4
+#define PSPV6_REG_CAPABILITIES 0x109fc
+
#define PSP_REG_INTEN 0x10690
#define PSP_REG_INTSTS 0x10694
#define PSP_REG_CMDRESP 0x10980
diff --git a/sys/dev/pci/ccp_pci.c b/sys/dev/pci/ccp_pci.c
index 49991d12563..96db0e5b1ea 100644
--- a/sys/dev/pci/ccp_pci.c
+++ b/sys/dev/pci/ccp_pci.c
@@ -50,6 +50,7 @@ static const struct pci_matchid ccp_pci_devices[] = {
{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_17_3X_CCP },
{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_17_90_CCP },
{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_19_1X_PSP },
+ { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_1A_PSP },
};
int
diff --git a/sys/dev/pci/psp_pci.c b/sys/dev/pci/psp_pci.c
index bd70866ed1c..b1161c7c83a 100644
--- a/sys/dev/pci/psp_pci.c
+++ b/sys/dev/pci/psp_pci.c
@@ -33,6 +33,7 @@ static const struct pci_matchid psp_pci_devices[] = {
{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_17_CCP_1 },
{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_17_3X_CCP },
{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_19_1X_PSP },
+ { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_1A_PSP },
};
int
@@ -67,6 +68,9 @@ psp_pci_intr_map(struct ccp_softc *sc, struct pci_attach_args *pa)
if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_17_CCP_1) {
reg_inten = PSPV1_REG_INTEN;
reg_intsts = PSPV1_REG_INTSTS;
+ } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_1A_PSP) {
+ reg_inten = PSPV6_REG_INTEN;
+ reg_intsts = PSPV6_REG_INTSTS;
} else {
reg_inten = PSP_REG_INTEN;
reg_intsts = PSP_REG_INTSTS;
@@ -111,6 +115,10 @@ psp_pci_attach(struct ccp_softc *sc, struct pci_attach_args *pa)
arg.version = 4;
reg_capabilities = PSP_REG_CAPABILITIES;
break;
+ case PCI_PRODUCT_AMD_1A_PSP:
+ arg.version = 6;
+ reg_capabilities = PSPV6_REG_CAPABILITIES;
+ break;
default:
reg_capabilities = PSP_REG_CAPABILITIES;
break;
psp(4) for AMD EPYC 9005 2/2