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64-bit DMA
> Date: Wed, 25 Feb 2026 13:34:13 +0000
> From: Vitaliy Makkoveev <mvs@openbsd.org>
>
> On Wed, Feb 25, 2026 at 02:09:11PM +0100, Mark Kettenis wrote:
> > > Date: Wed, 25 Feb 2026 12:50:37 +0000
> > > From: Vitaliy Makkoveev <mvs@openbsd.org>
> > >
> > > re(4) supports 64-bit DMA. Tested with
> > >
> > > re0 at pci3 dev 0 function 0 "Realtek 8168" rev 0x11: RTL8168G/8111G
> > > (0x4c00), msi
> >
> > Not quite as easy I fear. Older PCI variants apparently may have
> > issues with dual address cycle (DAC) transactions.
>
> I have and old Core2 motherboard, and if I'm not wrong it has re(4)
> related NIC. Is it old enough?
Probably not.
> However is easy to separate PCIe devices and enable 64-bit DMA only
> for them.
That was the heuristic I was leaning towards. The PCIe variants
should all work fine with 64-bit addresses. And most machines with
old PCI variants will heve less than 4GB of physical memory.
ok kettenis@
> Index: sys/dev/ic/re.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/ic/re.c,v
> diff -u -p -r1.220 re.c
> --- sys/dev/ic/re.c 10 May 2025 11:08:26 -0000 1.220
> +++ sys/dev/ic/re.c 25 Feb 2026 13:27:01 -0000
> @@ -667,6 +667,8 @@ re_attach(struct rl_softc *sc, const cha
> int error = 0, i;
> const struct re_revision *rr;
> const char *re_name = NULL;
> + int bus_dma64 = sc->rl_flags |= RL_FLAG_PCIE ?
> + BUS_DMA_64BIT : 0;
>
> sc->sc_hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
>
> @@ -913,7 +915,7 @@ re_attach(struct rl_softc *sc, const cha
> if ((error = bus_dmamem_alloc(sc->sc_dmat, RL_TX_LIST_SZ(sc),
> RL_RING_ALIGN, 0, &sc->rl_ldata.rl_tx_listseg, 1,
> &sc->rl_ldata.rl_tx_listnseg, BUS_DMA_NOWAIT |
> - BUS_DMA_ZERO)) != 0) {
> + BUS_DMA_ZERO | bus_dma64)) != 0) {
> printf("%s: can't allocate tx listseg, error = %d\n",
> sc->sc_dev.dv_xname, error);
> goto fail_0;
> @@ -930,7 +932,7 @@ re_attach(struct rl_softc *sc, const cha
> }
>
> if ((error = bus_dmamap_create(sc->sc_dmat, RL_TX_LIST_SZ(sc), 1,
> - RL_TX_LIST_SZ(sc), 0, 0,
> + RL_TX_LIST_SZ(sc), 0, bus_dma64,
> &sc->rl_ldata.rl_tx_list_map)) != 0) {
> printf("%s: can't create tx list map, error = %d\n",
> sc->sc_dev.dv_xname, error);
> @@ -949,7 +951,7 @@ re_attach(struct rl_softc *sc, const cha
> for (i = 0; i < sc->rl_ldata.rl_tx_desc_cnt; i++) {
> error = bus_dmamap_create(sc->sc_dmat,
> RL_JUMBO_FRAMELEN, sc->rl_ldata.rl_tx_ndescs,
> - RL_JUMBO_FRAMELEN, 0, 0,
> + RL_JUMBO_FRAMELEN, 0, bus_dma64,
> &sc->rl_ldata.rl_txq[i].txq_dmamap);
> if (error) {
> printf("%s: can't create DMA map for TX\n",
> @@ -962,7 +964,7 @@ re_attach(struct rl_softc *sc, const cha
> if ((error = bus_dmamem_alloc(sc->sc_dmat, RL_RX_DMAMEM_SZ(sc),
> RL_RING_ALIGN, 0, &sc->rl_ldata.rl_rx_listseg, 1,
> &sc->rl_ldata.rl_rx_listnseg, BUS_DMA_NOWAIT |
> - BUS_DMA_ZERO)) != 0) {
> + BUS_DMA_ZERO | bus_dma64)) != 0) {
> printf("%s: can't allocate rx listnseg, error = %d\n",
> sc->sc_dev.dv_xname, error);
> goto fail_4;
> @@ -980,7 +982,7 @@ re_attach(struct rl_softc *sc, const cha
> }
>
> if ((error = bus_dmamap_create(sc->sc_dmat, RL_RX_DMAMEM_SZ(sc), 1,
> - RL_RX_DMAMEM_SZ(sc), 0, 0,
> + RL_RX_DMAMEM_SZ(sc), 0, bus_dma64,
> &sc->rl_ldata.rl_rx_list_map)) != 0) {
> printf("%s: can't create rx list map, error = %d\n",
> sc->sc_dev.dv_xname, error);
> @@ -999,7 +1001,7 @@ re_attach(struct rl_softc *sc, const cha
> for (i = 0; i < sc->rl_ldata.rl_rx_desc_cnt; i++) {
> error = bus_dmamap_create(sc->sc_dmat,
> RL_FRAMELEN(sc->rl_max_mtu), 1,
> - RL_FRAMELEN(sc->rl_max_mtu), 0, 0,
> + RL_FRAMELEN(sc->rl_max_mtu), 0, bus_dma64,
> &sc->rl_ldata.rl_rxsoft[i].rxs_dmamap);
> if (error) {
> printf("%s: can't create DMA map for RX\n",
>
64-bit DMA