When running in VHE host mode, HCR_EL2.TGE must be set, as otherwise
a bunch of problems occur:

- EL0 is guest EL0, not host, and the kernel will catch fire on the
  first ERET to EL0

- EL1 TLB invalidations target the guest, and not the host

Make sure that HCR_EL2.TGE is set, instead of relying on firmware
to have set it (when booting with UEFI, only the first CPU is
correctly configured).

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 sys/arch/arm64/arm64/locore.S | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/sys/arch/arm64/arm64/locore.S b/sys/arch/arm64/arm64/locore.S
index 6fa0de541..03aa6f7d2 100644
--- a/sys/arch/arm64/arm64/locore.S
+++ b/sys/arch/arm64/arm64/locore.S
@@ -53,8 +53,13 @@ drop_to_el1:
 2:
 	/* Check for EL2 Host mode */
 	mrs	x2, hcr_el2
-	tbnz	x2, #34, 1b	/* HCR_E2H */
+	tbz	x2, #34, 3f	/* HCR_E2H */
 
+	orr	x2, x2, #HCR_TGE
+	msr	hcr_el2, x2
+	isb
+	b	1b
+3:
 	/* Configure the Hypervisor */
 	mov	x2, #(HCR_RW)
 	orr	x2, x2, #(HCR_API | HCR_APK)
@@ -100,13 +105,13 @@ drop_to_el1:
 	ubfx	x2, x2, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_BITS
 	/* GIC[3:0] == 0001 - GIC CPU interface via special regs. supported */
 	cmp	x2, #(ID_AA64PFR0_GIC_CPUIF_EN >> ID_AA64PFR0_GIC_SHIFT)
-	b.ne	3f
+	b.ne	4f
 
 	mrs	x2, icc_sre_el2
 	orr	x2, x2, #ICC_SRE_EL2_EN	/* Enable access from insecure EL1 */
 	orr	x2, x2, #ICC_SRE_EL2_SRE	/* Enable system registers */
 	msr	icc_sre_el2, x2
-3:
+4:
 
 	/* Set the address to return to our return address */
 	msr	elr_el2, x30
-- 
2.51.0