i thought it was weird that an MI driver like ix(4) is using an MD
number like PAGE_SIZE for the maximum segment size in its tx dma
maps.  the manual says tx segments can be 16k (and goes into a 16bit
field), so let's try using the documented value here.

the rx descs also use 16 * 1024 as a magic number here, so it's in
keeping with other code in the same driver.

ive only tested this on an Intel 82599 rev 0x01 on arm64, so tests
from other chips and sparc64 (which has an 8k page size) would be
appreciated.

Index: if_ix.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_ix.c,v
diff -u -p -r1.223 if_ix.c
--- if_ix.c	26 Feb 2026 23:38:10 -0000	1.223
+++ if_ix.c	21 Apr 2026 03:53:50 -0000
@@ -2292,7 +2291,7 @@ ixgbe_allocate_transmit_buffers(struct i
 	for (i = 0; i < sc->num_tx_desc; i++) {
 		txbuf = &txr->tx_buffers[i];
 		error = bus_dmamap_create(txr->txdma.dma_tag, MAXMCLBYTES,
-			    sc->num_segs, PAGE_SIZE, 0,
+			    sc->num_segs, 16 * 1024, 0,
 			    BUS_DMA_NOWAIT | BUS_DMA_64BIT, &txbuf->map);
 
 		if (error != 0) {