On 26-05-19 02:38:57, Brad Smith wrote:
> While porting some software for RISC-V CPU feature detection I noticed
> a few pieces of software like Orc and some crypto libraries check for
> the RISC-V extension Zvkb.

It was omitted somewhat intentionally since Zvbb is a superset of Zvkb and
I'm not currently aware of hardware that has Zvkb and not Zvbb. Is it easy
to look for Zvbb instead? If not we can add it to simplify ports.

> Index: include/elf.h
> ===================================================================
> RCS file: /cvs/src/sys/arch/riscv64/include/elf.h,v
> retrieving revision 1.4
> diff -u -p -u -p -r1.4 elf.h
> --- include/elf.h	2 May 2026 14:09:17 -0000	1.4
> +++ include/elf.h	17 May 2026 23:41:02 -0000
> @@ -92,5 +92,6 @@ extern unsigned long hwcap2;
>  #define HWCAP2_ISA_ZVKSED	(1UL << 13)	/* Vector ShangMi SM4 */
>  #define HWCAP2_ISA_ZVKSH	(1UL << 14)	/* Vector ShangMi SM3 */
>  #define HWCAP2_ISA_ZVKT		(1UL << 15)	/* Vector Data-Independent Execution */
> +#define HWCAP2_ISA_ZVKB		(1UL << 16)	/* Vector Cryptography Bit Manipulation */
>  
>  #endif /* !_MACHINE_ELF_H_ */
> Index: riscv64/cpu.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/riscv64/riscv64/cpu.c,v
> retrieving revision 1.28
> diff -u -p -u -p -r1.28 cpu.c
> --- riscv64/cpu.c	9 May 2026 17:38:50 -0000	1.28
> +++ riscv64/cpu.c	17 May 2026 23:41:02 -0000
> @@ -128,6 +128,7 @@ const struct extension {
>  	{ "zvksed", 0, HWCAP2_ISA_ZVKSED },
>  	{ "zvksh", 0, HWCAP2_ISA_ZVKSH },
>  	{ "zvkt", 0, HWCAP2_ISA_ZVKT },
> +	{ "zvkb", 0, HWCAP2_ISA_ZVKB },
>  	{ NULL, 0, 0 }
>  };
>