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From:
Jonathan Gray <jsg@jsg.id.au>
Subject:
em(4): match Panther Lake and Wildcat Lake
To:
tech@openbsd.org
Date:
Wed, 5 Aug 2026 12:27:03 +1000

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  • Jonathan Gray:

    em(4): match Panther Lake and Wildcat Lake

tested on 0x57b3 / E1000_DEV_ID_PCH_PTP_I219_LM25

diff --git sys/dev/pci/if_em.c sys/dev/pci/if_em.c
index 49d2e79333f..4a11030b87c 100644
--- sys/dev/pci/if_em.c
+++ sys/dev/pci/if_em.c
@@ -171,6 +171,8 @@ const struct pci_matchid em_devices[] = {
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM22 },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM23 },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM24 },
+	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM25 },
+	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM27 },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V2 },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V4 },
@@ -194,6 +196,8 @@ const struct pci_matchid em_devices[] = {
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V22 },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V23 },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V24 },
+	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V25 },
+	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V27 },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_COPPER },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_FIBER },
 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_SERDES },
@@ -514,6 +518,7 @@ em_attach(struct device *parent, struct device *self, void *aux)
 		case em_pch_tgp:
 		case em_pch_adp:
 		case em_pch_mtp:
+		case em_pch_ptp:
 		case em_80003es2lan:
 			/* 9K Jumbo Frame size */
 			sc->hw.max_frame_size = 9234;
@@ -931,6 +936,7 @@ em_init(void *arg)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		pba = E1000_PBA_26K;
 		break;
 	default:
diff --git sys/dev/pci/if_em_hw.c sys/dev/pci/if_em_hw.c
index 0fa41af15fc..d7e57f344da 100644
--- sys/dev/pci/if_em_hw.c
+++ sys/dev/pci/if_em_hw.c
@@ -667,6 +667,12 @@ em_set_mac_type(struct em_hw *hw)
 	case E1000_DEV_ID_PCH_ARL_I219_V24:
 		hw->mac_type = em_pch_mtp;
 		break;
+	case E1000_DEV_ID_PCH_PTP_I219_LM25:
+	case E1000_DEV_ID_PCH_PTP_I219_V25:
+	case E1000_DEV_ID_PCH_WCL_I219_LM27:
+	case E1000_DEV_ID_PCH_WCL_I219_V27:
+		hw->mac_type = em_pch_ptp;
+		break;
 	case E1000_DEV_ID_EP80579_LAN_1:
 		hw->mac_type = em_icp_xxxx;
 		hw->icp_xxxx_port_num = 0;
@@ -702,6 +708,7 @@ em_set_mac_type(struct em_hw *hw)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		hw->swfwhw_semaphore_present = TRUE;
 		hw->asf_firmware_present = TRUE;
 		break;
@@ -898,6 +905,7 @@ em_set_media_type(struct em_hw *hw)
 		case em_pch_tgp:
 		case em_pch_adp:
 		case em_pch_mtp:
+		case em_pch_ptp:
 		case em_82573:
 		case em_82574:
 			/*
@@ -1061,6 +1069,7 @@ em_reset_hw(struct em_hw *hw)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		if (!hw->phy_reset_disable &&
 		    em_check_phy_reset_block(hw) == E1000_SUCCESS) {
 			/*
@@ -1326,6 +1335,7 @@ em_initialize_hardware_bits(struct em_softc *sc)
 		case em_pch_tgp:
 		case em_pch_adp:
 		case em_pch_mtp:
+		case em_pch_ptp:
 			if (hw->mac_type == em_ich8lan)
 				/* Set TARC0 bits 29 and 28 */
 				reg_tarc0 |= 0x30000000;
@@ -1808,6 +1818,7 @@ em_init_hw(struct em_softc *sc)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		/*
 		 * Old code always initialized queue 1,
 		 * even when unused, keep behaviour
@@ -1957,6 +1968,7 @@ em_setup_link(struct em_hw *hw)
 		case em_pch_tgp:
 		case em_pch_adp:
 		case em_pch_mtp:
+		case em_pch_ptp:
 		case em_82573:
 		case em_82574:
 			hw->fc = E1000_FC_FULL;
@@ -3174,6 +3186,7 @@ em_setup_copper_link(struct em_hw *hw)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		/*
 		 * Set the mac to wait the maximum time between each
 		 * iteration and increase the max iterations when polling the
@@ -6093,6 +6106,7 @@ em_match_gig_phy(struct em_hw *hw)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		if (hw->phy_id == I217_E_PHY_ID)
 			match = TRUE;
 		break;
@@ -6432,6 +6446,7 @@ em_init_eeprom_params(struct em_hw *hw)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		{
 			int32_t         i = 0;
 			uint32_t        flash_size = EM_READ_REG(hw, 0xc /* STRAP */);
@@ -7150,6 +7165,7 @@ em_validate_eeprom_checksum(struct em_hw *hw)
 		case em_pch_tgp:
 		case em_pch_adp:
 		case em_pch_mtp:
+		case em_pch_ptp:
 			word = EEPROM_COMPAT;
 			valid_csum_mask = EEPROM_COMPAT_VALID_CSUM;
 			break;
@@ -8394,6 +8410,7 @@ em_get_bus_info(struct em_hw *hw)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		hw->bus_type = em_bus_type_pci_express;
 		hw->bus_speed = em_bus_speed_2500;
 		hw->bus_width = em_bus_width_pciex_1;
@@ -9592,6 +9609,7 @@ em_get_auto_rd_done(struct em_hw *hw)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		while (timeout) {
 			if (E1000_READ_REG(hw, EECD) & E1000_EECD_AUTO_RD)
 				break;
@@ -9996,6 +10014,7 @@ em_valid_nvm_bank_detect_ich8lan(struct em_hw *hw, uint32_t *bank)
 	case em_pch_tgp:
 	case em_pch_adp:
 	case em_pch_mtp:
+	case em_pch_ptp:
 		bank1_offset = hw->flash_bank_size * 2;
 		act_offset = E1000_ICH_NVM_SIG_WORD * 2;
 
diff --git sys/dev/pci/if_em_hw.h sys/dev/pci/if_em_hw.h
index b18514f3619..82d9e89e47e 100644
--- sys/dev/pci/if_em_hw.h
+++ sys/dev/pci/if_em_hw.h
@@ -86,6 +86,7 @@ typedef enum {
     em_pch_tgp,
     em_pch_adp,
     em_pch_mtp,
+    em_pch_ptp,
     em_num_macs
 } em_mac_type;
 
@@ -593,6 +594,11 @@ uint32_t em_translate_82542_register(uint32_t);
 #define E1000_DEV_ID_PCH_RPL_I219_V23    0x0DC6
 #define E1000_DEV_ID_PCH_ARL_I219_LM24   0x57A0
 #define E1000_DEV_ID_PCH_ARL_I219_V24    0x57A1
+#define E1000_DEV_ID_PCH_PTP_I219_LM25   0x57B3
+#define E1000_DEV_ID_PCH_PTP_I219_V25    0x57B4
+#define E1000_DEV_ID_PCH_WCL_I219_LM27   0x57B7
+#define E1000_DEV_ID_PCH_WCL_I219_V27    0x57B8
+
 #define E1000_DEV_ID_82575EB_PT          0x10A7
 #define E1000_DEV_ID_82575EB_PF          0x10A9
 #define E1000_DEV_ID_82575GB_QP          0x10D6