huc panics, probably missing mei pxp stuff
---
 sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c b/sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c
index 21bea4eae3b..b9aafc5395c 100644
--- a/sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c
+++ b/sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c
@@ -110,9 +110,15 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
 	fw_def(BROXTON,      0, guc_mmp(bxt,  70, 1, 1)) \
 	fw_def(SKYLAKE,      0, guc_mmp(skl,  70, 1, 1))
 
+/* HuC for DG2 is disabled for now
+ *
+ * order of definitions matters, it goes below METEORLAKE
+ *
+ * fw_def(DG2,          0, huc_gsc(dg2))
+ *
+ */
 #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \
 	fw_def(METEORLAKE,   0, huc_gsc(mtl)) \
-	fw_def(DG2,          0, huc_gsc(dg2)) \
 	fw_def(ALDERLAKE_P,  0, huc_raw(tgl)) \
 	fw_def(ALDERLAKE_P,  0, huc_mmp(tgl,  7, 9, 3)) \
 	fw_def(ALDERLAKE_S,  0, huc_raw(tgl)) \