From a6acd7f705605dbef55add5dc37367bff1fcefc9 Mon Sep 17 00:00:00 2001 From: Carsten Beckmann Date: Mon, 21 Sep 2026 16:50:44 +0200 Subject: [PATCH 8/8] iavf: rework RSS capability configuration Currently the RSS capabilites are configured depending on the PCI ID of the device. Only NICs of the 700 series are considered though, with an Intel E810-C (and presumably other NICs of the 800 series) iavf_config_hena fails. We could add another case for them and hardcode their capabilities, which at least for the E810-C would be ICE_DEFAULT_RSS_HENA. It seems better to just make it generic though, so rework it to query the supported capabilities from the PF and then configure them afterwards. --- sys/dev/pci/if_iavf.c | 43 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 4 deletions(-) diff --git a/sys/dev/pci/if_iavf.c b/sys/dev/pci/if_iavf.c index 4e1a1baef9e..f2d7963062b 100644 --- a/sys/dev/pci/if_iavf.c +++ b/sys/dev/pci/if_iavf.c @@ -341,6 +341,10 @@ struct iavf_vc_rss_lut { uint8_t lut[1]; }__packed; +struct iavf_vc_rss_hena_caps { + uint64_t caps; +}__packed; + #define IAVF_RSS_VSI_LUT_ENTRY_MASK 0x3F /* aq response codes */ @@ -646,6 +650,7 @@ struct iavf_softc { unsigned int sc_base_queue; uint32_t sc_rss_key_size; uint32_t sc_rss_lut_size; + uint64_t sc_rss_hena_caps; struct cond sc_admin_cond; int sc_admin_result; @@ -1320,6 +1325,27 @@ iavf_config_vsi_queues(struct iavf_softc *sc) return (0); } +static int +iavf_config_get_rss_hena_caps(struct iavf_softc *sc) +{ + struct iavf_aq_desc iaq; + int rv; + + memset(&iaq, 0, sizeof(iaq)); + iaq.iaq_opcode = htole16(IAVF_AQ_OP_SEND_TO_PF); + iaq.iaq_vc_opcode = htole32(IAVF_VC_OP_GET_RSS_HENA_CAPS); + iavf_aq_dva(&iaq, IAVF_DMA_DVA(&sc->sc_scratch)); + + iavf_atq_post(sc, &iaq); + rv = iavf_arq_wait(sc, IAVF_EXEC_TIMEOUT); + if (rv != IAVF_VC_RC_SUCCESS) { + printf("%s: GET_RSS_HENA_CAPS failed: %d\n", DEVNAME(sc), rv); + return (1); + } + + return (0); +} + static int iavf_config_hena(struct iavf_softc *sc) { @@ -1335,8 +1361,7 @@ iavf_config_hena(struct iavf_softc *sc) iavf_aq_dva(&iaq, IAVF_DMA_DVA(&sc->sc_scratch)); caps = IAVF_DMA_KVA(&sc->sc_scratch); - *caps = (sc->sc_mac_type == I40E_MAC_X722_VF) ? IXL_RSS_HENA_BASE_722 : - IXL_RSS_HENA_BASE_710; + *caps = sc->sc_rss_hena_caps; iavf_atq_post(sc, &iaq); rv = iavf_arq_wait(sc, IAVF_EXEC_TIMEOUT); @@ -1488,7 +1513,8 @@ iavf_up(struct iavf_softc *sc) if (iavf_config_vsi_queues(sc) != 0) goto down; - if (iavf_config_hena(sc) != 0 || + if (iavf_config_get_rss_hena_caps(sc) != 0 || + iavf_config_hena(sc) != 0 || iavf_config_rss_key(sc) != 0 || iavf_config_rss_lut(sc) != 0) goto down; @@ -2731,6 +2757,7 @@ iavf_process_arq(struct iavf_softc *sc) struct iavf_aq_desc *arq, *iaq; struct iavf_aq_buf *aqb; struct iavf_vc_version_info *ver; + struct iavf_vc_rss_hena_caps *caps; unsigned int cons = sc->sc_arq_cons; unsigned int prod; int done = 0; @@ -2782,12 +2809,20 @@ iavf_process_arq(struct iavf_softc *sc) iavf_process_irq_map(sc, iaq); break; + case IAVF_VC_OP_GET_RSS_HENA_CAPS: + sc->sc_admin_result = letoh32(iaq->iaq_vc_retval); + if (sc->sc_admin_result == IAVF_VC_RC_SUCCESS) { + caps = aqb->aqb_data; + sc->sc_rss_hena_caps = caps->caps; + } + cond_signal(&sc->sc_admin_cond); + break; + case IAVF_VC_OP_CONFIG_TX_QUEUE: case IAVF_VC_OP_CONFIG_RX_QUEUE: case IAVF_VC_OP_CONFIG_VSI_QUEUES: case IAVF_VC_OP_ENABLE_QUEUES: case IAVF_VC_OP_DISABLE_QUEUES: - case IAVF_VC_OP_GET_RSS_HENA_CAPS: case IAVF_VC_OP_SET_RSS_HENA: case IAVF_VC_OP_ADD_ETH_ADDR: case IAVF_VC_OP_DEL_ETH_ADDR: -- 2.53.0