From: j@bitminer.ca Subject: arm64: remove misplaced code To: Tech Date: Sat, 02 Mar 2024 10:04:20 -0400 This removes duplicate code in the wrong place. The correct code remains near line 943, masking off various csv2/3 and 32-bit fields. --J Index: cpu.c =================================================================== RCS file: /cvs/src/sys/arch/arm64/arm64/cpu.c,v retrieving revision 1.107 diff -u -p -r1.107 cpu.c --- cpu.c 1 Mar 2024 15:57:43 -0000 1.107 +++ cpu.c 2 Mar 2024 13:47:50 -0000 @@ -518,16 +518,7 @@ cpu_identify(struct cpu_info *ci) printf("\n%s: mismatched ID_AA64ISAR2_EL1", ci->ci_dev->dv_xname); } - id = READ_SPECIALREG(id_aa64pfr0_el1); - /* Allow CSV2/CVS3 to be different. */ - id &= ~ID_AA64PFR0_CSV2_MASK; - id &= ~ID_AA64PFR0_CSV3_MASK; - /* Ignore 32-bit support in all exception levels. */ - id &= ~ID_AA64PFR0_EL0_MASK; - id &= ~ID_AA64PFR0_EL1_MASK; - id &= ~ID_AA64PFR0_EL2_MASK; - id &= ~ID_AA64PFR0_EL3_MASK; - if (id != cpu_id_aa64pfr0) { + if (READ_SPECIALREG(id_aa64pfr0_el1) != cpu_id_aa64pfr0) { printf("\n%s: mismatched ID_AA64PFR0_EL1", ci->ci_dev->dv_xname); }