From: Jonathan Gray <jsg@jsg.id.au>
Subject: use 1U << 31 in ahci(4)
To: tech@openbsd.org
Date: Mon, 22 Apr 2024 19:00:33 +1000

kubsan: dev/ic/ahci.c:412:6: shift: left shift of 1 by 31 places cannot be represented in type 'int'
kubsan: dev/ic/ahci.c:423:31: shift: left shift of 1 by 31 places cannot be represented in type 'int'
kubsan: dev/ic/ahci.c:270:8: shift: left shift of 1 by 31 places cannot be represented in type 'int
kubsan: dev/ic/ahci.c:1786:36: shift: left shift of 1 by 31 places cannot be represented in type 'int'
kubsan: dev/ic/ahci.c:325:31: shift: left shift of 1 by 31 places cannot be represented in type 'int'

Index: sys/dev/ic/ahci.c
===================================================================
RCS file: /cvs/src/sys/dev/ic/ahci.c,v
diff -u -p -r1.39 ahci.c
--- sys/dev/ic/ahci.c	3 Feb 2023 18:31:16 -0000	1.39
+++ sys/dev/ic/ahci.c	22 Apr 2024 07:41:03 -0000
@@ -267,7 +267,7 @@ noccc:
 	 */
 	sc->sc_ncmds = max(2, sc->sc_ncmds);
 	for (i = 0; i < AHCI_MAX_PORTS; i++) {
-		if (!ISSET(pi, 1 << i)) {
+		if (!ISSET(pi, 1U << i)) {
 			/* dont allocate stuff if the port isnt implemented */
 			continue;
 		}
Index: sys/dev/ic/ahcireg.h
===================================================================
RCS file: /cvs/src/sys/dev/ic/ahcireg.h,v
diff -u -p -r1.5 ahcireg.h
--- sys/dev/ic/ahcireg.h	11 Feb 2015 07:13:44 -0000	1.5
+++ sys/dev/ic/ahcireg.h	22 Apr 2024 05:49:29 -0000
@@ -42,7 +42,7 @@
 #define  AHCI_REG_CAP_SMPS		(1<<28) /* Mech Presence Switch */
 #define  AHCI_REG_CAP_SSNTF		(1<<29) /* SNotification Register */
 #define  AHCI_REG_CAP_SNCQ		(1<<30) /* Native Cmd Queuing */
-#define  AHCI_REG_CAP_S64A		(1<<31) /* 64bit Addressing */
+#define  AHCI_REG_CAP_S64A		(1U<<31) /* 64bit Addressing */
 #define  AHCI_FMT_CAP		"\020" "\040S64A" "\037NCQ" "\036SSNTF" \
 				    "\035SMPS" "\034SSS" "\033SALP" "\032SAL" \
 				    "\031SCLO" "\024SNZO" "\023SAM" "\022SPM" \
@@ -52,7 +52,7 @@
 #define  AHCI_REG_GHC_HR		(1<<0) /* HBA Reset */
 #define  AHCI_REG_GHC_IE		(1<<1) /* Interrupt Enable */
 #define  AHCI_REG_GHC_MRSM		(1<<2) /* MSI Revert to Single Msg */
-#define  AHCI_REG_GHC_AE		(1<<31) /* AHCI Enable */
+#define  AHCI_REG_GHC_AE		(1U<<31) /* AHCI Enable */
 #define AHCI_FMT_GHC		"\020" "\040AE" "\003MRSM" "\002IE" "\001HR"
 #define AHCI_REG_IS		0x008 /* Interrupt Status */
 #define AHCI_REG_PI		0x00c /* Ports Implemented */
@@ -103,7 +103,7 @@
 #define  AHCI_PREG_IS_HBDS		(1<<28) /* Host Bus Data Error */
 #define  AHCI_PREG_IS_HBFS		(1<<29) /* Host Bus Fatal Error */
 #define  AHCI_PREG_IS_TFES		(1<<30) /* Task File Error */
-#define  AHCI_PREG_IS_CPDS		(1<<31) /* Cold Presence Detect */
+#define  AHCI_PREG_IS_CPDS		(1U<<31) /* Cold Presence Detect */
 #define AHCI_PFMT_IS		"\20" "\040CPDS" "\037TFES" "\036HBFS" \
 				    "\035HBDS" "\034IFS" "\033INFS" "\031OFS" \
 				    "\030IPMS" "\027PRCS" "\010DMPS" "\006DPS" \
@@ -126,7 +126,7 @@
 #define  AHCI_PREG_IE_HBDE		(1<<28) /* Host Bus Data Error */
 #define  AHCI_PREG_IE_HBFE		(1<<29) /* Host Bus Fatal Error */
 #define  AHCI_PREG_IE_TFEE		(1<<30) /* Task File Error */
-#define  AHCI_PREG_IE_CPDE		(1<<31) /* Cold Presence Detect */
+#define  AHCI_PREG_IE_CPDE		(1U<<31) /* Cold Presence Detect */
 #define AHCI_PFMT_IE		"\20" "\040CPDE" "\037TFEE" "\036HBFE" \
 				    "\035HBDE" "\034IFE" "\033INFE" "\031OFE" \
 				    "\030IPME" "\027PRCE" "\010DMPE" "\007PCE" \
@@ -275,7 +275,7 @@ struct ahci_prdt {
 	u_int64_t		dba;
 	u_int32_t		reserved;
 	u_int32_t		flags;
-#define AHCI_PRDT_FLAG_INTR		(1<<31) /* interrupt on completion */
+#define AHCI_PRDT_FLAG_INTR		(1U<<31) /* interrupt on completion */
 } __packed __aligned(8);
 
 /* this makes ahci_cmd_table 512 bytes, supporting 128-byte alignment */