From: Jonathan Matthew <jonathan@d14n.org>
Subject: Re: armv7, arm64, riscv64: count interrupts
To: Miod Vallat <miod@online.fr>
Cc: tech@openbsd.org
Date: Fri, 28 Feb 2025 22:13:54 +1000

On Tue, Feb 25, 2025 at 04:21:34PM +0000, Miod Vallat wrote:
> As shown by vmstat -s, armv7 does not report interrupts (although you
> can get that number with vmstat -i), and arm64 and riscv64 report
> neither interrupts nor traps.
> 
> The following diff adds the missing counter work.

Tested on armv7, ok jmatthew@

> 
> Index: sys/arch/arm64/arm64/intr.c
> ===================================================================
> RCS file: /OpenBSD/src/sys/arch/arm64/arm64/intr.c,v
> diff -u -p -r1.30 intr.c
> --- sys/arch/arm64/arm64/intr.c	17 Feb 2025 21:08:40 -0000	1.30
> +++ sys/arch/arm64/arm64/intr.c	25 Feb 2025 15:34:15 -0000
> @@ -20,6 +20,8 @@
>  #include <sys/timetc.h>
>  #include <sys/malloc.h>
>  
> +#include <uvm/uvm_extern.h>
> +
>  #include <dev/clock_subr.h>
>  #include <machine/cpu.h>
>  #include <machine/intr.h>
> @@ -74,6 +76,7 @@ arm_cpu_irq(void *frame)
>  {
>  	struct cpu_info	*ci = curcpu();
>  
> +	uvmexp.intrs++;
>  	ci->ci_idepth++;
>  	(*arm_irq_dispatch)(frame);
>  	ci->ci_idepth--;
> @@ -86,6 +89,7 @@ arm_cpu_fiq(void *frame)
>  {
>  	struct cpu_info	*ci = curcpu();
>  
> +	uvmexp.intrs++;
>  	ci->ci_idepth++;
>  	(*arm_fiq_dispatch)(frame);
>  	ci->ci_idepth--;
> Index: sys/arch/arm64/arm64/trap.c
> ===================================================================
> RCS file: /OpenBSD/src/sys/arch/arm64/arm64/trap.c,v
> diff -u -p -r1.51 trap.c
> --- sys/arch/arm64/arm64/trap.c	11 Feb 2025 22:27:09 -0000	1.51
> +++ sys/arch/arm64/arm64/trap.c	25 Feb 2025 15:34:16 -0000
> @@ -291,6 +291,7 @@ do_el1h_sync(struct trapframe *frame)
>  	far = READ_SPECIALREG(far_el1);
>  
>  	intr_enable();
> +	uvmexp.traps++;
>  
>  	/*
>  	 * Sanity check we are in an exception er can handle. The IL bit
> @@ -361,6 +362,7 @@ do_el0_sync(struct trapframe *frame)
>  	far = READ_SPECIALREG(far_el1);
>  
>  	intr_enable();
> +	uvmexp.traps++;
>  
>  	p->p_addr->u_pcb.pcb_tf = frame;
>  	refreshcreds(p);
> Index: sys/arch/armv7/armv7/intr.c
> ===================================================================
> RCS file: /OpenBSD/src/sys/arch/armv7/armv7/intr.c,v
> diff -u -p -r1.23 intr.c
> --- sys/arch/armv7/armv7/intr.c	5 Aug 2024 13:55:34 -0000	1.23
> +++ sys/arch/armv7/armv7/intr.c	25 Feb 2025 15:34:16 -0000
> @@ -19,6 +19,8 @@
>  #include <sys/systm.h>
>  #include <sys/malloc.h>
>  
> +#include <uvm/uvm_extern.h>
> +
>  #include <arm/cpufunc.h>
>  #include <machine/cpu.h>
>  #include <machine/intr.h>
> @@ -62,6 +64,7 @@ void (*arm_intr_dispatch)(void *) = arm_
>  void
>  arm_intr(void *frame)
>  {
> +	uvmexp.intrs++;
>  	/* XXX - change this to have irq_dispatch use function pointer */
>  	(*arm_intr_dispatch)(frame);
>  }
> Index: sys/arch/riscv64/riscv64/intr.c
> ===================================================================
> RCS file: /OpenBSD/src/sys/arch/riscv64/riscv64/intr.c,v
> diff -u -p -r1.12 intr.c
> --- sys/arch/riscv64/riscv64/intr.c	6 Aug 2024 09:07:15 -0000	1.12
> +++ sys/arch/riscv64/riscv64/intr.c	25 Feb 2025 15:34:18 -0000
> @@ -21,6 +21,8 @@
>  #include <sys/atomic.h>
>  #include <sys/malloc.h>
>  
> +#include <uvm/uvm_extern.h>
> +
>  #include <machine/cpu.h>
>  #include <machine/intr.h>
>  #include <machine/sbi.h>
> @@ -66,6 +68,7 @@ riscv_cpu_intr(void *frame)
>  {
>  	struct cpu_info	*ci = curcpu();
>  
> +	uvmexp.intrs++;
>  	ci->ci_idepth++;
>  	(*riscv_intr_dispatch)(frame);
>  	ci->ci_idepth--;
> Index: sys/arch/riscv64/riscv64/trap.c
> ===================================================================
> RCS file: /OpenBSD/src/sys/arch/riscv64/riscv64/trap.c,v
> diff -u -p -r1.19 trap.c
> --- sys/arch/riscv64/riscv64/trap.c	28 Nov 2023 09:10:18 -0000	1.19
> +++ sys/arch/riscv64/riscv64/trap.c	25 Feb 2025 15:34:18 -0000
> @@ -80,6 +80,7 @@ do_trap_supervisor(struct trapframe *fra
>  	}
>  
>  	intr_enable();
> +	uvmexp.traps++;
>  
>  	exception = (frame->tf_scause & EXCP_MASK);
>  	switch (exception) {
> @@ -132,6 +133,7 @@ do_trap_user(struct trapframe *frame)
>  	}
>  
>  	intr_enable();
> +	uvmexp.traps++;
>  	refreshcreds(p);
>  
>  	exception = (frame->tf_scause & EXCP_MASK);
>