From: Kevin Lo Subject: rge(4): add support for RTL8125D To: tech@openbsd.org Date: Fri, 11 Apr 2025 15:02:01 +0800 Hi, The diff below adds support for RTL8125D and updates microcode for RTL8125B. The RTL8125D chipset is currently only used on motherboards. Tested on MSI PRO B840-P WIFI motherboard and TP-LINK TL-NG421 adapter: rge0 at pci4 dev 0 function 0 "Realtek RTL8125" rev 0x0c: msix, address 34:5a:60:xx:xx:xx rge0 at pci3 dev 0 function 0 "Realtek RTL8125" rev 0x04: msix, address 7c:b5:9b:xx:xx:xx ok? Index: share/man/man4/pci.4 =================================================================== RCS file: /cvs/src/share/man/man4/pci.4,v diff -u -p -u -p -r1.410 pci.4 --- share/man/man4/pci.4 26 Nov 2024 21:59:30 -0000 1.410 +++ share/man/man4/pci.4 11 Apr 2025 06:45:37 -0000 @@ -261,7 +261,7 @@ AMD PCnet-PCI 10/100 Ethernet device .It Xr re 4 Realtek 8139C+/8169/816xS/811xS/8168/810xE 10/100/1Gb Ethernet device .It Xr rge 4 -Realtek 8125/8125B/8126 PCI Express 10/100/1Gb/2.5Gb/5Gb Ethernet device +Realtek 8125/8125B/8125D/8126 PCI Express 10/100/1Gb/2.5Gb/5Gb Ethernet device .It Xr rl 4 Realtek 8129/8139 10/100 Ethernet device .It Xr se 4 Index: share/man/man4/rge.4 =================================================================== RCS file: /cvs/src/share/man/man4/rge.4,v diff -u -p -u -p -r1.7 rge.4 --- share/man/man4/rge.4 30 Jun 2024 08:13:02 -0000 1.7 +++ share/man/man4/rge.4 11 Apr 2025 06:45:37 -0000 @@ -19,15 +19,16 @@ .Os .Sh NAME .Nm rge -.Nd Realtek 8125/8125B/8126 PCI Express 10/100/1Gb/2.5Gb/5Gb Ethernet device +.Nd Realtek 8125/8125B/8125D/8126 PCI Express 10/100/1Gb/2.5Gb/5Gb \ +Ethernet device .Sh SYNOPSIS .Cd "rge* at pci?" .Sh DESCRIPTION The .Nm driver provides support for NICs based on the -Realtek RTL8125, RTL8125B and RTL8126 PCI Express Ethernet controllers, -including the following: +Realtek RTL8125, RTL8125B, RTL8125D and RTL8126 PCI Express Ethernet +controllers, including the following: .Pp .Bl -bullet -offset indent -compact .It @@ -40,7 +41,7 @@ Rivet Networks Killer E3000 Adapter (250 TP-LINK TL-NG421 Adapter (2500baseT) .El .Pp -NICs based on the 8125 and 8125B are capable of 10, 100, 1000 and +NICs based on the 8125, 8125B and 8125D are capable of 10, 100, 1000 and 2500Mbps operation. NICs based on the 8126 are capable of 10, 100, 1000, 2500 and 5000Mbps operation. Index: sys/dev/pci/if_rge.c =================================================================== RCS file: /cvs/src/sys/dev/pci/if_rge.c,v diff -u -p -u -p -r1.36 if_rge.c --- sys/dev/pci/if_rge.c 1 Apr 2025 09:12:39 -0000 1.36 +++ sys/dev/pci/if_rge.c 11 Apr 2025 06:45:38 -0000 @@ -1,7 +1,7 @@ /* $OpenBSD: if_rge.c,v 1.36 2025/04/01 09:12:39 kettenis Exp $ */ /* - * Copyright (c) 2019, 2020, 2023, 2024 + * Copyright (c) 2019, 2020, 2023-2025 * Kevin Lo * * Permission to use, copy, modify, and distribute this software for any @@ -84,12 +84,14 @@ void rge_iff(struct rge_softc *); void rge_chipinit(struct rge_softc *); void rge_set_phy_power(struct rge_softc *, int); void rge_ephy_config(struct rge_softc *); -void rge_ephy_config_mac_cfg3(struct rge_softc *); -void rge_ephy_config_mac_cfg5(struct rge_softc *); +void rge_ephy_config_mac_r25(struct rge_softc *); +void rge_ephy_config_mac_r25b(struct rge_softc *); +void rge_mac_config_mcu(struct rge_softc *, enum rge_mac_type); int rge_phy_config(struct rge_softc *); -void rge_phy_config_mac_cfg2_8126(struct rge_softc *); -void rge_phy_config_mac_cfg3(struct rge_softc *); -void rge_phy_config_mac_cfg5(struct rge_softc *); +void rge_phy_config_mac_r26(struct rge_softc *); +void rge_phy_config_mac_r25(struct rge_softc *); +void rge_phy_config_mac_r25b(struct rge_softc *); +void rge_phy_config_mac_r25d(struct rge_softc *); void rge_phy_config_mcu(struct rge_softc *, uint16_t); void rge_set_macaddr(struct rge_softc *, const uint8_t *); void rge_get_macaddr(struct rge_softc *, uint8_t *); @@ -132,12 +134,14 @@ void rge_kstat_attach(struct rge_softc static const struct { uint16_t reg; uint16_t val; -} rtl8125_mac_cfg3_mcu[] = { - RTL8125_MAC_CFG3_MCU -}, rtl8125_mac_cfg5_mcu[] = { - RTL8125_MAC_CFG5_MCU -}, rtl8126_mac_cfg2_mcu[] = { - RTL8126_MAC_CFG2_MCU +} mac_r25_mcu[] = { + MAC_R25_MCU +}, mac_r25b_mcu[] = { + MAC_R25B_MCU +}, mac_r25d_mcu[] = { + MAC_R25D_MCU +}, mac_r26_mcu[] = { + MAC_R26_MCU }; const struct cfattach rge_ca = { @@ -237,13 +241,16 @@ rge_attach(struct device *parent, struct hwrev = RGE_READ_4(sc, RGE_TXCFG) & RGE_TXCFG_HWREV; switch (hwrev) { case 0x60900000: - sc->rge_type = MAC_CFG3; + sc->rge_type = MAC_R25; break; case 0x64100000: - sc->rge_type = MAC_CFG5; + sc->rge_type = MAC_R25B; break; case 0x64900000: - sc->rge_type = MAC_CFG2_8126; + sc->rge_type = MAC_R26; + break; + case 0x68800000: + sc->rge_type = MAC_R25D; break; default: printf(": unknown version 0x%08x\n", hwrev); @@ -686,23 +693,25 @@ rge_init(struct ifnet *ifp) RGE_ADDR_HI(q->q_tx.rge_tx_list_map->dm_segs[0].ds_addr)); /* Set the initial RX and TX configurations. */ - if (sc->rge_type == MAC_CFG3) + if (sc->rge_type == MAC_R25) rxconf = RGE_RXCFG_CONFIG; - else if (sc->rge_type == MAC_CFG5) + else if (sc->rge_type == MAC_R25B) rxconf = RGE_RXCFG_CONFIG_8125B; + else if (sc->rge_type == MAC_R25D) + rxconf = RGE_RXCFG_CONFIG_8125D; else rxconf = RGE_RXCFG_CONFIG_8126; RGE_WRITE_4(sc, RGE_RXCFG, rxconf); RGE_WRITE_4(sc, RGE_TXCFG, RGE_TXCFG_CONFIG); - val = rge_read_csi(sc, 0x70c) & ~0xff000000; + val = rge_read_csi(sc, 0x70c) & ~0x3f000000; rge_write_csi(sc, 0x70c, val | 0x27000000); - if (sc->rge_type == MAC_CFG2_8126) { + if (sc->rge_type == MAC_R26) { /* Disable L1 timeout. */ val = rge_read_csi(sc, 0x890) & ~0x00000001; rge_write_csi(sc, 0x890, val); - } else + } else if (sc->rge_type != MAC_R25D) RGE_WRITE_2(sc, 0x0382, 0x221b); RGE_WRITE_1(sc, RGE_RSS_CTRL, 0); @@ -717,13 +726,13 @@ rge_init(struct ifnet *ifp) RGE_MAC_SETBIT(sc, 0xeb58, 0x0001); - if (sc->rge_type == MAC_CFG2_8126) + if (sc->rge_type == MAC_R26) RGE_CLRBIT_1(sc, 0xd8, 0x02); val = rge_read_mac_ocp(sc, 0xe614) & ~0x0700; - if (sc->rge_type == MAC_CFG3) + if (sc->rge_type == MAC_R25 || sc->rge_type == MAC_R25D) rge_write_mac_ocp(sc, 0xe614, val | 0x0300); - else if (sc->rge_type == MAC_CFG5) + else if (sc->rge_type == MAC_R25B) rge_write_mac_ocp(sc, 0xe614, val | 0x0200); else rge_write_mac_ocp(sc, 0xe614, val | 0x0400); @@ -733,7 +742,7 @@ rge_init(struct ifnet *ifp) ((fls(sc->sc_nqueues) - 1) & 0x03) << 10); RGE_MAC_CLRBIT(sc, 0xe63e, 0x0030); - if (sc->rge_type != MAC_CFG5) + if (sc->rge_type != MAC_R25B) RGE_MAC_SETBIT(sc, 0xe63e, 0x0020); RGE_MAC_CLRBIT(sc, 0xc0b4, 0x0001); @@ -756,7 +765,10 @@ rge_init(struct ifnet *ifp) val = rge_read_mac_ocp(sc, 0xea1c) & ~0x0003; rge_write_mac_ocp(sc, 0xea1c, val | 0x0001); - rge_write_mac_ocp(sc, 0xe0c0, 0x4000); + if (sc->rge_type == MAC_R25D) + rge_write_mac_ocp(sc, 0xe0c0, 0x4403); + else + rge_write_mac_ocp(sc, 0xe0c0, 0x4000); RGE_MAC_SETBIT(sc, 0xe052, 0x0060); RGE_MAC_CLRBIT(sc, 0xe052, 0x0088); @@ -766,13 +778,15 @@ rge_init(struct ifnet *ifp) RGE_SETBIT_1(sc, RGE_DLLPR, RGE_DLLPR_PFM_EN | RGE_DLLPR_TX_10M_PS_EN); - if (sc->rge_type == MAC_CFG3) + if (sc->rge_type == MAC_R25) RGE_SETBIT_1(sc, RGE_MCUCMD, 0x01); - /* Disable EEE plus. */ - RGE_MAC_CLRBIT(sc, 0xe080, 0x0002); + if (sc->rge_type != MAC_R25D) { + /* Disable EEE plus. */ + RGE_MAC_CLRBIT(sc, 0xe080, 0x0002); + } - if (sc->rge_type == MAC_CFG2_8126) + if (sc->rge_type == MAC_R26) RGE_MAC_CLRBIT(sc, 0xea1c, 0x0304); else RGE_MAC_CLRBIT(sc, 0xea1c, 0x0004); @@ -784,7 +798,7 @@ rge_init(struct ifnet *ifp) RGE_CLRBIT_2(sc, 0x1880, 0x0030); /* Config interrupt type for RTL8125B/RTL8126. */ - if (sc->rge_type != MAC_CFG3) + if (sc->rge_type != MAC_R25) RGE_CLRBIT_1(sc, RGE_INT_CFG0, RGE_INT_CFG0_EN); /* Clear timer interrupts. */ @@ -793,12 +807,13 @@ rge_init(struct ifnet *ifp) RGE_WRITE_4(sc, RGE_TIMERINT2, 0); RGE_WRITE_4(sc, RGE_TIMERINT3, 0); - num_miti = (sc->rge_type == MAC_CFG3) ? 64 : 32; + num_miti = + (sc->rge_type == MAC_R25 || sc->rge_type == MAC_R25D) ? 64 : 32; /* Clear interrupt moderation timer. */ for (i = 0; i < num_miti; i++) RGE_WRITE_4(sc, RGE_INTMITI(i), 0); - if (sc->rge_type == MAC_CFG5) { + if (sc->rge_type == MAC_R25B) { RGE_CLRBIT_1(sc, RGE_INT_CFG0, RGE_INT_CFG0_TIMEOUT_BYPASS | RGE_INT_CFG0_MITIGATION_BYPASS); @@ -813,8 +828,11 @@ rge_init(struct ifnet *ifp) val = rge_read_csi(sc, 0x98) & ~0x0000ff00; rge_write_csi(sc, 0x98, val); - val = rge_read_mac_ocp(sc, 0xe092) & ~0x00ff; - rge_write_mac_ocp(sc, 0xe092, val); + if (sc->rge_type == MAC_R25D) { + val = rge_read_mac_ocp(sc, 0xe092) & ~0x00ff; + rge_write_mac_ocp(sc, 0xe092, val | 0x0008); + } else + RGE_MAC_CLRBIT(sc, 0xe092, 0x00ff); if (ifp->if_capabilities & IFCAP_VLAN_HWTAGGING) RGE_SETBIT_4(sc, RGE_RXCFG, RGE_RXCFG_VLANSTRIP); @@ -921,12 +939,12 @@ rge_ifmedia_upd(struct ifnet *ifp) /* Disable Gigabit Lite. */ RGE_PHY_CLRBIT(sc, 0xa428, 0x0200); RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0001); - if (sc->rge_type == MAC_CFG2_8126) + if (sc->rge_type == MAC_R26) RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0002); val = rge_read_phy_ocp(sc, 0xa5d4); val &= ~RGE_ADV_2500TFDX; - if (sc->rge_type == MAC_CFG2_8126) + if (sc->rge_type == MAC_R26) val &= ~RGE_ADV_5000TFDX; anar = ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10; @@ -934,7 +952,7 @@ rge_ifmedia_upd(struct ifnet *ifp) switch (IFM_SUBTYPE(ifm->ifm_media)) { case IFM_AUTO: - val |= (sc->rge_type != MAC_CFG2_8126) ? + val |= (sc->rge_type != MAC_R26) ? RGE_ADV_2500TFDX : (RGE_ADV_2500TFDX | RGE_ADV_5000TFDX); break; case IFM_5000_T: @@ -1450,16 +1468,16 @@ rge_reset(struct rge_softc *sc) /* Enable RXDV gate. */ RGE_SETBIT_1(sc, RGE_PPSW, 0x08); - DELAY(2000); RGE_SETBIT_1(sc, RGE_CMD, RGE_CMD_STOPREQ); - if (sc->rge_type != MAC_CFG2_8126) { + if (sc->rge_type == MAC_R25) { for (i = 0; i < 20; i++) { DELAY(10); if (!(RGE_READ_1(sc, RGE_CMD) & RGE_CMD_STOPREQ)) break; } - } + } else + DELAY(200); for (i = 0; i < 3000; i++) { DELAY(50); @@ -1468,7 +1486,7 @@ rge_reset(struct rge_softc *sc) RGE_MCUCMD_TXFIFO_EMPTY)) break; } - if (sc->rge_type != MAC_CFG3) { + if (sc->rge_type != MAC_R25) { for (i = 0; i < 3000; i++) { DELAY(50); if ((RGE_READ_2(sc, RGE_IM) & 0x0103) == 0x0103) @@ -1476,7 +1494,8 @@ rge_reset(struct rge_softc *sc) } } - DELAY(2000); + RGE_WRITE_1(sc, RGE_CMD, + RGE_READ_1(sc, RGE_CMD) & RGE_CMD_TXENB | RGE_CMD_RXENB); /* Soft reset. */ RGE_WRITE_1(sc, RGE_CMD, RGE_CMD_RESET); @@ -1573,14 +1592,100 @@ rge_set_phy_power(struct rge_softc *sc, } void +rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) +{ + uint16_t reg; + int i, npages; + + if (type == MAC_R25) { + for (npages = 0; npages < 3; npages++) { + rge_switch_mcu_ram_page(sc, npages); + for (i = 0; i < nitems(rtl8125_mac_bps); i++) { + if (npages == 0) + rge_write_mac_ocp(sc, + rtl8125_mac_bps[i].reg, + rtl8125_mac_bps[i].val); + else if (npages == 1) + rge_write_mac_ocp(sc, + rtl8125_mac_bps[i].reg, 0); + else { + if (rtl8125_mac_bps[i].reg < 0xf9f8) + rge_write_mac_ocp(sc, + rtl8125_mac_bps[i].reg, 0); + } + } + if (npages == 2) { + rge_write_mac_ocp(sc, 0xf9f8, 0x6486); + rge_write_mac_ocp(sc, 0xf9fa, 0x0b15); + rge_write_mac_ocp(sc, 0xf9fc, 0x090e); + rge_write_mac_ocp(sc, 0xf9fe, 0x1139); + } + } + rge_write_mac_ocp(sc, 0xfc26, 0x8000); + rge_write_mac_ocp(sc, 0xfc2a, 0x0540); + rge_write_mac_ocp(sc, 0xfc2e, 0x0a06); + rge_write_mac_ocp(sc, 0xfc30, 0x0eb8); + rge_write_mac_ocp(sc, 0xfc32, 0x3a5c); + rge_write_mac_ocp(sc, 0xfc34, 0x10a8); + rge_write_mac_ocp(sc, 0xfc40, 0x0d54); + rge_write_mac_ocp(sc, 0xfc42, 0x0e24); + rge_write_mac_ocp(sc, 0xfc48, 0x307a); + } else if (type == MAC_R25B) { + rge_switch_mcu_ram_page(sc, 0); + for (i = 0; i < nitems(rtl8125b_mac_bps); i++) { + rge_write_mac_ocp(sc, rtl8125b_mac_bps[i].reg, + rtl8125b_mac_bps[i].val); + } + } else if (type == MAC_R25D) { + for (npages = 0; npages < 3; npages++) { + rge_switch_mcu_ram_page(sc, npages); + + rge_write_mac_ocp(sc, 0xf800, + (npages == 0) ? 0xe002 : 0); + rge_write_mac_ocp(sc, 0xf802, + (npages == 0) ? 0xe006 : 0); + rge_write_mac_ocp(sc, 0xf804, + (npages == 0) ? 0x4166 : 0); + rge_write_mac_ocp(sc, 0xf806, + (npages == 0) ? 0x9cf6 : 0); + rge_write_mac_ocp(sc, 0xf808, + (npages == 0) ? 0xc002 : 0); + rge_write_mac_ocp(sc, 0xf80a, + (npages == 0) ? 0xb800 : 0); + rge_write_mac_ocp(sc, 0xf80c, + (npages == 0) ? 0x14a4 : 0); + rge_write_mac_ocp(sc, 0xf80e, + (npages == 0) ? 0xc102 : 0); + rge_write_mac_ocp(sc, 0xf810, + (npages == 0) ? 0xb900 : 0); + + for (reg = 0xf812; reg <= 0xf9f6; reg += 2) + rge_write_mac_ocp(sc, reg, 0); + + rge_write_mac_ocp(sc, 0xf9f8, + (npages == 2) ? 0x6938 : 0); + rge_write_mac_ocp(sc, 0xf9fa, + (npages == 2) ? 0x0a18 : 0); + rge_write_mac_ocp(sc, 0xf9fc, + (npages == 2) ? 0x0217 : 0); + rge_write_mac_ocp(sc, 0xf9fe, + (npages == 2) ? 0x0d2a : 0); + } + rge_write_mac_ocp(sc, 0xfc26, 0x8000); + rge_write_mac_ocp(sc, 0xfc28, 0x14a2); + rge_write_mac_ocp(sc, 0xfc48, 0x0001); + } +} + +void rge_ephy_config(struct rge_softc *sc) { switch (sc->rge_type) { - case MAC_CFG3: - rge_ephy_config_mac_cfg3(sc); + case MAC_R25: + rge_ephy_config_mac_r25(sc); break; - case MAC_CFG5: - rge_ephy_config_mac_cfg5(sc); + case MAC_R25B: + rge_ephy_config_mac_r25b(sc); break; default: break; /* Nothing to do. */ @@ -1588,14 +1693,13 @@ rge_ephy_config(struct rge_softc *sc) } void -rge_ephy_config_mac_cfg3(struct rge_softc *sc) +rge_ephy_config_mac_r25(struct rge_softc *sc) { uint16_t val; int i; - for (i = 0; i < nitems(rtl8125_mac_cfg3_ephy); i++) - rge_write_ephy(sc, rtl8125_mac_cfg3_ephy[i].reg, - rtl8125_mac_cfg3_ephy[i].val); + for (i = 0; i < nitems(mac_r25_ephy); i++) + rge_write_ephy(sc, mac_r25_ephy[i].reg, mac_r25_ephy[i].val); val = rge_read_ephy(sc, 0x002a) & ~0x7000; rge_write_ephy(sc, 0x002a, val | 0x3000); @@ -1614,13 +1718,12 @@ rge_ephy_config_mac_cfg3(struct rge_soft } void -rge_ephy_config_mac_cfg5(struct rge_softc *sc) +rge_ephy_config_mac_r25b(struct rge_softc *sc) { int i; - for (i = 0; i < nitems(rtl8125_mac_cfg5_ephy); i++) - rge_write_ephy(sc, rtl8125_mac_cfg5_ephy[i].reg, - rtl8125_mac_cfg5_ephy[i].val); + for (i = 0; i < nitems(mac_r25b_ephy); i++) + rge_write_ephy(sc, mac_r25b_ephy[i].reg, mac_r25b_ephy[i].val); } int @@ -1637,7 +1740,7 @@ rge_phy_config(struct rge_softc *sc) rge_write_phy(sc, 0, MII_100T2CR, rge_read_phy(sc, 0, MII_100T2CR) & ~(GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX)); - if (sc->rge_type == MAC_CFG2_8126) + if (sc->rge_type == MAC_R26) RGE_PHY_CLRBIT(sc, 0xa5d4, RGE_ADV_2500TFDX | RGE_ADV_5000TFDX); else RGE_PHY_CLRBIT(sc, 0xa5d4, RGE_ADV_2500TFDX); @@ -1658,14 +1761,17 @@ rge_phy_config(struct rge_softc *sc) sc->rge_mcodever = rge_read_phy_ocp(sc, 0xa438); switch (sc->rge_type) { - case MAC_CFG2_8126: - rge_phy_config_mac_cfg2_8126(sc); + case MAC_R26: + rge_phy_config_mac_r26(sc); + break; + case MAC_R25: + rge_phy_config_mac_r25(sc); break; - case MAC_CFG3: - rge_phy_config_mac_cfg3(sc); + case MAC_R25B: + rge_phy_config_mac_r25b(sc); break; - case MAC_CFG5: - rge_phy_config_mac_cfg5(sc); + case MAC_R25D: + rge_phy_config_mac_r25d(sc); break; default: break; /* Can't happen. */ @@ -1675,15 +1781,15 @@ rge_phy_config(struct rge_softc *sc) /* Disable EEE. */ RGE_MAC_CLRBIT(sc, 0xe040, 0x0003); - if (sc->rge_type == MAC_CFG3) { + if (sc->rge_type == MAC_R25) { RGE_MAC_CLRBIT(sc, 0xeb62, 0x0006); RGE_PHY_CLRBIT(sc, 0xa432, 0x0010); - } else if (sc->rge_type == MAC_CFG5) + } else if (sc->rge_type == MAC_R25B || sc->rge_type == MAC_R25D) RGE_PHY_SETBIT(sc, 0xa432, 0x0010); RGE_PHY_CLRBIT(sc, 0xa5d0, 0x0006); RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0001); - if (sc->rge_type == MAC_CFG2_8126) + if (sc->rge_type == MAC_R26) RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0002); RGE_PHY_CLRBIT(sc, 0xa6d8, 0x0010); RGE_PHY_CLRBIT(sc, 0xa428, 0x0080); @@ -1698,7 +1804,7 @@ rge_phy_config(struct rge_softc *sc) } void -rge_phy_config_mac_cfg2_8126(struct rge_softc *sc) +rge_phy_config_mac_r26(struct rge_softc *sc) { uint16_t val; int i; @@ -1715,7 +1821,7 @@ rge_phy_config_mac_cfg2_8126(struct rge_ 0x0054, 0x0322, 0x00dd, 0x03ab, 0x03dc, 0x0027, 0x000e, 0x03e5, 0x03f9, 0x0012, 0x0001, 0x03f1 }; - rge_phy_config_mcu(sc, RGE_MAC_CFG2_8126_MCODE_VER); + rge_phy_config_mcu(sc, RGE_MAC_R26_MCODE_VER); RGE_PHY_SETBIT(sc, 0xa442, 0x0800); rge_write_phy_ocp(sc, 0xa436, 0x80bf); @@ -1978,7 +2084,7 @@ rge_phy_config_mac_cfg2_8126(struct rge_ } void -rge_phy_config_mac_cfg3(struct rge_softc *sc) +rge_phy_config_mac_r25(struct rge_softc *sc) { uint16_t val; int i; @@ -1994,7 +2100,7 @@ rge_phy_config_mac_cfg3(struct rge_softc 0xc022, 0x175a, 0xc024, 0x19c0, 0xc026, 0x1c26, 0xc089, 0x6050, 0xc08a, 0x5f6e, 0xc08c, 0x6e6e, 0xc08e, 0x6e6e, 0xc090, 0x6e12 }; - rge_phy_config_mcu(sc, RGE_MAC_CFG3_MCODE_VER); + rge_phy_config_mcu(sc, RGE_MAC_R25_MCODE_VER); RGE_PHY_SETBIT(sc, 0xad4e, 0x0010); val = rge_read_phy_ocp(sc, 0xad16) & ~0x03ff; @@ -2062,12 +2168,12 @@ rge_phy_config_mac_cfg3(struct rge_softc } void -rge_phy_config_mac_cfg5(struct rge_softc *sc) +rge_phy_config_mac_r25b(struct rge_softc *sc) { uint16_t val; int i; - rge_phy_config_mcu(sc, RGE_MAC_CFG5_MCODE_VER); + rge_phy_config_mcu(sc, RGE_MAC_R25B_MCODE_VER); RGE_PHY_SETBIT(sc, 0xa442, 0x0800); val = rge_read_phy_ocp(sc, 0xac46) & ~0x00f0; @@ -2099,6 +2205,199 @@ rge_phy_config_mac_cfg5(struct rge_softc } void +rge_phy_config_mac_r25d(struct rge_softc *sc) +{ + uint16_t val; + int i; + + rge_phy_config_mcu(sc, RGE_MAC_R25D_MCODE_VER); + + RGE_PHY_SETBIT(sc, 0xa442, 0x0800); + + rge_patch_phy_mcu(sc, 1); + RGE_PHY_SETBIT(sc, 0xbf96, 0x8000); + val = rge_read_phy_ocp(sc, 0xbf94) & ~0x0007; + rge_write_phy_ocp(sc, 0xbf94, val | 0x0005); + val = rge_read_phy_ocp(sc, 0xbf8e) & ~0x3c00; + rge_write_phy_ocp(sc, 0xbf8e, val | 0x2800); + val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000; + rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000); + RGE_PHY_SETBIT(sc, 0xbcd8, 0xc000); + val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000; + rge_write_phy_ocp(sc, 0xbcd8, val | 0x4000); + val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f; + rge_write_phy_ocp(sc, 0xbc80, val | 0x0004); + RGE_PHY_SETBIT(sc, 0xbc82, 0xe000); + RGE_PHY_SETBIT(sc, 0xbc82, 0x1c00); + val = rge_read_phy_ocp(sc, 0xbc80) & ~0x001f; + rge_write_phy_ocp(sc, 0xbc80, val | 0x0005); + val = rge_read_phy_ocp(sc, 0xbc82) & ~0x00e0; + rge_write_phy_ocp(sc, 0xbc82, val | 0x0040); + RGE_PHY_SETBIT(sc, 0xbc82, 0x001c); + RGE_PHY_CLRBIT(sc, 0xbcd8, 0xc000); + val = rge_read_phy_ocp(sc, 0xbcd8) & ~0xc000; + rge_write_phy_ocp(sc, 0xbcd8, val | 0x8000); + RGE_PHY_CLRBIT(sc, 0xbcd8, 0xc000); + RGE_PHY_CLRBIT(sc, 0xbd70, 0x0100); + RGE_PHY_SETBIT(sc, 0xa466, 0x0002); + rge_write_phy_ocp(sc, 0xa436, 0x836a); + RGE_PHY_CLRBIT(sc, 0xa438, 0xff00); + rge_patch_phy_mcu(sc, 0); + + rge_write_phy_ocp(sc, 0xb87c, 0x832c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0500); + val = rge_read_phy_ocp(sc, 0xb106) & ~0x0700; + rge_write_phy_ocp(sc, 0xb106, val | 0x0100); + val = rge_read_phy_ocp(sc, 0xb206) & ~0x0700; + rge_write_phy_ocp(sc, 0xb206, val | 0x0200); + val = rge_read_phy_ocp(sc, 0xb306) & ~0x0700; + rge_write_phy_ocp(sc, 0xb306, val | 0x0300); + rge_write_phy_ocp(sc, 0xb87c, 0x80cb); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0300); + rge_write_phy_ocp(sc, 0xbcf4, 0x0000); + rge_write_phy_ocp(sc, 0xbcf6, 0x0000); + rge_write_phy_ocp(sc, 0xbc12, 0x0000); + rge_write_phy_ocp(sc, 0xb87c, 0x844d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0200); + + rge_write_phy_ocp(sc, 0xb87c, 0x8feb); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8fe9); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0600); + + val = rge_read_phy_ocp(sc, 0xac7e) & ~0x01fc; + rge_write_phy_ocp(sc, 0xac7e, val | 0x00B4); + rge_write_phy_ocp(sc, 0xb87c, 0x8105); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x7a00); + rge_write_phy_ocp(sc, 0xb87c, 0x8117); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x3a00); + rge_write_phy_ocp(sc, 0xb87c, 0x8103); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x7400); + rge_write_phy_ocp(sc, 0xb87c, 0x8115); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x3400); + RGE_PHY_CLRBIT(sc, 0xad40, 0x0030); + val = rge_read_phy_ocp(sc, 0xad66) & ~0x000f; + rge_write_phy_ocp(sc, 0xad66, val | 0x0007); + val = rge_read_phy_ocp(sc, 0xad68) & ~0xf000; + rge_write_phy_ocp(sc, 0xad68, val | 0x8000); + val = rge_read_phy_ocp(sc, 0xad68) & ~0x0f00; + rge_write_phy_ocp(sc, 0xad68, val | 0x0500); + val = rge_read_phy_ocp(sc, 0xad68) & ~0x000f; + rge_write_phy_ocp(sc, 0xad68, val | 0x0002); + val = rge_read_phy_ocp(sc, 0xad6a) & ~0xf000; + rge_write_phy_ocp(sc, 0xad6a, val | 0x7000); + rge_write_phy_ocp(sc, 0xac50, 0x01e8); + rge_write_phy_ocp(sc, 0xa436, 0x81fa); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x5400); + val = rge_read_phy_ocp(sc, 0xa864) & ~0x00f0; + rge_write_phy_ocp(sc, 0xa864, val | 0x00c0); + val = rge_read_phy_ocp(sc, 0xa42c) & ~0x00ff; + rge_write_phy_ocp(sc, 0xa42c, val | 0x0002); + rge_write_phy_ocp(sc, 0xa436, 0x80e1); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x0f00); + rge_write_phy_ocp(sc, 0xa436, 0x80de); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xf000; + rge_write_phy_ocp(sc, 0xa438, val | 0x0700); + RGE_PHY_SETBIT(sc, 0xa846, 0x0080); + rge_write_phy_ocp(sc, 0xa436, 0x80ba); + rge_write_phy_ocp(sc, 0xa438, 0x8a04); + rge_write_phy_ocp(sc, 0xa436, 0x80bd); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0xca00); + rge_write_phy_ocp(sc, 0xa436, 0x80b7); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0xb300); + rge_write_phy_ocp(sc, 0xa436, 0x80ce); + rge_write_phy_ocp(sc, 0xa438, 0x8a04); + rge_write_phy_ocp(sc, 0xa436, 0x80d1); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0xca00); + rge_write_phy_ocp(sc, 0xa436, 0x80cb); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0xbb00); + rge_write_phy_ocp(sc, 0xa436, 0x80a6); + rge_write_phy_ocp(sc, 0xa438, 0x4909); + rge_write_phy_ocp(sc, 0xa436, 0x80a8); + rge_write_phy_ocp(sc, 0xa438, 0x05b8); + rge_write_phy_ocp(sc, 0xa436, 0x8200); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x5800); + rge_write_phy_ocp(sc, 0xa436, 0x8ff1); + rge_write_phy_ocp(sc, 0xa438, 0x7078); + rge_write_phy_ocp(sc, 0xa436, 0x8ff3); + rge_write_phy_ocp(sc, 0xa438, 0x5d78); + rge_write_phy_ocp(sc, 0xa436, 0x8ff5); + rge_write_phy_ocp(sc, 0xa438, 0x7862); + rge_write_phy_ocp(sc, 0xa436, 0x8ff7); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x1400); + + rge_write_phy_ocp(sc, 0xa436, 0x814c); + rge_write_phy_ocp(sc, 0xa438, 0x8455); + rge_write_phy_ocp(sc, 0xa436, 0x814e); + rge_write_phy_ocp(sc, 0xa438, 0x84a6); + rge_write_phy_ocp(sc, 0xa436, 0x8163); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x0600); + rge_write_phy_ocp(sc, 0xa436, 0x816a); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x0500); + rge_write_phy_ocp(sc, 0xa436, 0x8171); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x1f00); + + val = rge_read_phy_ocp(sc, 0xbc3a) & ~0x000f; + rge_write_phy_ocp(sc, 0xbc3a, val | 0x0006); + for (i = 0; i < 10; i++) { + rge_write_phy_ocp(sc, 0xa436, 0x8064 + i * 3); + RGE_PHY_CLRBIT(sc, 0xa438, 0x0700); + } + val = rge_read_phy_ocp(sc, 0xbfa0) & ~0xff70; + rge_write_phy_ocp(sc, 0xbfa0, val | 0x5500); + rge_write_phy_ocp(sc, 0xbfa2, 0x9d00); + rge_write_phy_ocp(sc, 0xa436, 0x8165); + val = rge_read_phy_ocp(sc, 0xa438) & ~0x0700; + rge_write_phy_ocp(sc, 0xa438, val | 0x0200); + + rge_write_phy_ocp(sc, 0xa436, 0x8019); + RGE_PHY_SETBIT(sc, 0xa438, 0x0100); + rge_write_phy_ocp(sc, 0xa436, 0x8fe3); + rge_write_phy_ocp(sc, 0xa438, 0x0005); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x00ed); + rge_write_phy_ocp(sc, 0xa438, 0x0502); + rge_write_phy_ocp(sc, 0xa438, 0x0b00); + rge_write_phy_ocp(sc, 0xa438, 0xd401); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x2900); + + rge_write_phy_ocp(sc, 0xa436, 0x8018); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x1700); + + rge_write_phy_ocp(sc, 0xa436, 0x815b); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x1700); + + RGE_PHY_CLRBIT(sc, 0xa4e0, 0x8000); + RGE_PHY_CLRBIT(sc, 0xa5d4, 0x0020); + RGE_PHY_CLRBIT(sc, 0xa654, 0x0800); + RGE_PHY_SETBIT(sc, 0xa430, 0x1001); + RGE_PHY_SETBIT(sc, 0xa442, 0x0080); +} + +void rge_phy_config_mcu(struct rge_softc *sc, uint16_t mcode_version) { if (sc->rge_mcodever != mcode_version) { @@ -2106,7 +2405,7 @@ rge_phy_config_mcu(struct rge_softc *sc, rge_patch_phy_mcu(sc, 1); - if (sc->rge_type == MAC_CFG3) { + if (sc->rge_type == MAC_R25) { rge_write_phy_ocp(sc, 0xa436, 0x8024); rge_write_phy_ocp(sc, 0xa438, 0x8601); rge_write_phy_ocp(sc, 0xa436, 0xb82e); @@ -2114,11 +2413,9 @@ rge_phy_config_mcu(struct rge_softc *sc, RGE_PHY_SETBIT(sc, 0xb820, 0x0080); - for (i = 0; i < nitems(rtl8125_mac_cfg3_mcu); i++) { + for (i = 0; i < nitems(mac_r25_mcu); i++) rge_write_phy_ocp(sc, - rtl8125_mac_cfg3_mcu[i].reg, - rtl8125_mac_cfg3_mcu[i].val); - } + mac_r25_mcu[i].reg, mac_r25_mcu[i].val); RGE_PHY_CLRBIT(sc, 0xb820, 0x0080); @@ -2127,18 +2424,30 @@ rge_phy_config_mcu(struct rge_softc *sc, RGE_PHY_CLRBIT(sc, 0xb82e, 0x0001); rge_write_phy_ocp(sc, 0xa436, 0x8024); rge_write_phy_ocp(sc, 0xa438, 0); - } else if (sc->rge_type == MAC_CFG5) { - for (i = 0; i < nitems(rtl8125_mac_cfg5_mcu); i++) { + } else if (sc->rge_type == MAC_R25B) { + for (i = 0; i < nitems(mac_r25b_mcu); i++) rge_write_phy_ocp(sc, - rtl8125_mac_cfg5_mcu[i].reg, - rtl8125_mac_cfg5_mcu[i].val); - } - } else if (sc->rge_type == MAC_CFG2_8126) { - for (i = 0; i < nitems(rtl8126_mac_cfg2_mcu); i++) { + mac_r25b_mcu[i].reg, mac_r25b_mcu[i].val); + } else if (sc->rge_type == MAC_R25D) { + for (i = 0; i < 2403; i++) rge_write_phy_ocp(sc, - rtl8126_mac_cfg2_mcu[i].reg, - rtl8126_mac_cfg2_mcu[i].val); - } + mac_r25d_mcu[i].reg, mac_r25d_mcu[i].val); + rge_patch_phy_mcu(sc, 0); + + rge_patch_phy_mcu(sc, 1); + for (; i < 2528; i++) + rge_write_phy_ocp(sc, + mac_r25d_mcu[i].reg, mac_r25d_mcu[i].val); + rge_patch_phy_mcu(sc, 0); + + rge_patch_phy_mcu(sc, 1); + for (; i < nitems(mac_r25d_mcu); i++) + rge_write_phy_ocp(sc, + mac_r25d_mcu[i].reg, mac_r25d_mcu[i].val); + } else if (sc->rge_type == MAC_R26) { + for (i = 0; i < nitems(mac_r26_mcu); i++) + rge_write_phy_ocp(sc, + mac_r26_mcu[i].reg, mac_r26_mcu[i].val); } rge_patch_phy_mcu(sc, 0); @@ -2178,7 +2487,6 @@ void rge_hw_init(struct rge_softc *sc) { uint16_t reg; - int i, npages; rge_disable_aspm_clkreq(sc); RGE_CLRBIT_1(sc, 0xf1, 0x80); @@ -2194,49 +2502,10 @@ rge_hw_init(struct rge_softc *sc) DELAY(3000); rge_write_mac_ocp(sc, 0xfc26, 0); - if (sc->rge_type == MAC_CFG3) { - for (npages = 0; npages < 3; npages++) { - rge_switch_mcu_ram_page(sc, npages); - for (i = 0; i < nitems(rtl8125_mac_bps); i++) { - if (npages == 0) - rge_write_mac_ocp(sc, - rtl8125_mac_bps[i].reg, - rtl8125_mac_bps[i].val); - else if (npages == 1) - rge_write_mac_ocp(sc, - rtl8125_mac_bps[i].reg, 0); - else { - if (rtl8125_mac_bps[i].reg < 0xf9f8) - rge_write_mac_ocp(sc, - rtl8125_mac_bps[i].reg, 0); - } - } - if (npages == 2) { - rge_write_mac_ocp(sc, 0xf9f8, 0x6486); - rge_write_mac_ocp(sc, 0xf9fa, 0x0b15); - rge_write_mac_ocp(sc, 0xf9fc, 0x090e); - rge_write_mac_ocp(sc, 0xf9fe, 0x1139); - } - } - rge_write_mac_ocp(sc, 0xfc26, 0x8000); - rge_write_mac_ocp(sc, 0xfc2a, 0x0540); - rge_write_mac_ocp(sc, 0xfc2e, 0x0a06); - rge_write_mac_ocp(sc, 0xfc30, 0x0eb8); - rge_write_mac_ocp(sc, 0xfc32, 0x3a5c); - rge_write_mac_ocp(sc, 0xfc34, 0x10a8); - rge_write_mac_ocp(sc, 0xfc40, 0x0d54); - rge_write_mac_ocp(sc, 0xfc42, 0x0e24); - rge_write_mac_ocp(sc, 0xfc48, 0x307a); - } else if (sc->rge_type == MAC_CFG5) { - rge_switch_mcu_ram_page(sc, 0); - for (i = 0; i < nitems(rtl8125b_mac_bps); i++) { - rge_write_mac_ocp(sc, rtl8125b_mac_bps[i].reg, - rtl8125b_mac_bps[i].val); - } - } + rge_mac_config_mcu(sc, sc->rge_type); /* Disable PHY power saving. */ - if (sc->rge_type == MAC_CFG3) + if (sc->rge_type == MAC_R25) rge_disable_phy_ocp_pwrsave(sc); /* Set PCIe uncorrectable error status. */ @@ -2308,7 +2577,7 @@ rge_add_media_types(struct rge_softc *sc ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_2500_T, 0, NULL); ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_2500_T | IFM_FDX, 0, NULL); - if (sc->rge_type == MAC_CFG2_8126) { + if (sc->rge_type == MAC_R26) { ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T, 0, NULL); ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T | IFM_FDX, 0, NULL); @@ -2333,13 +2602,23 @@ rge_config_imtype(struct rge_softc *sc, void rge_disable_aspm_clkreq(struct rge_softc *sc) { - RGE_SETBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG); - if (sc->rge_type == MAC_CFG2_8126) + int unlock = 1; + + if ((RGE_READ_1(sc, RGE_EECMD) & RGE_EECMD_WRITECFG) == + RGE_EECMD_WRITECFG) + unlock = 0; + + if (unlock) + RGE_SETBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG); + + if (sc->rge_type == MAC_R26) RGE_CLRBIT_1(sc, RGE_INT_CFG0, 0x08); else RGE_CLRBIT_1(sc, RGE_CFG2, RGE_CFG2_CLKREQ_EN); RGE_CLRBIT_1(sc, RGE_CFG5, RGE_CFG5_PME_STS); - RGE_CLRBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG); + + if (unlock) + RGE_CLRBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG); } void @@ -2400,10 +2679,6 @@ rge_exit_oob(struct rge_softc *sc) { int i; - RGE_CLRBIT_4(sc, RGE_RXCFG, RGE_RXCFG_ALLPHYS | RGE_RXCFG_INDIV | - RGE_RXCFG_MULTI | RGE_RXCFG_BROAD | RGE_RXCFG_RUNT | - RGE_RXCFG_ERRPKT); - /* Disable RealWoW. */ rge_write_mac_ocp(sc, 0xc0bc, 0x00ff); @@ -2437,7 +2712,7 @@ rge_exit_oob(struct rge_softc *sc) DELAY(1000); } RGE_MAC_CLRBIT(sc, 0xd42c, 0x0100); - if (sc->rge_type != MAC_CFG3) + if (sc->rge_type != MAC_R25) RGE_PHY_CLRBIT(sc, 0xa466, 0x0001); RGE_PHY_CLRBIT(sc, 0xa468, 0x000a); } Index: sys/dev/pci/if_rgereg.h =================================================================== RCS file: /cvs/src/sys/dev/pci/if_rgereg.h,v diff -u -p -u -p -r1.13 if_rgereg.h --- sys/dev/pci/if_rgereg.h 21 Aug 2024 01:12:52 -0000 1.13 +++ sys/dev/pci/if_rgereg.h 11 Apr 2025 06:45:38 -0000 @@ -1,7 +1,7 @@ /* $OpenBSD: if_rgereg.h,v 1.13 2024/08/21 01:12:52 dlg Exp $ */ /* - * Copyright (c) 2019, 2020 Kevin Lo + * Copyright (c) 2019, 2020, 2025 Kevin Lo * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -358,17 +358,17 @@ struct rge_queues { }; /* Microcode version */ -#define RGE_MAC_CFG2_8126_MCODE_VER 0x0033 -#define RGE_MAC_CFG3_MCODE_VER 0x0b33 -#define RGE_MAC_CFG5_MCODE_VER 0x0b74 +#define RGE_MAC_R25D_MCODE_VER 0x0027 +#define RGE_MAC_R26_MCODE_VER 0x0033 +#define RGE_MAC_R25_MCODE_VER 0x0b33 +#define RGE_MAC_R25B_MCODE_VER 0x0b99 enum rge_mac_type { - MAC_CFG_UNKNOWN = 1, - MAC_CFG2, - MAC_CFG3, - MAC_CFG4, - MAC_CFG5, - MAC_CFG2_8126 + MAC_UNKNOWN = 1, + MAC_R25, + MAC_R25B, + MAC_R25D, + MAC_R26 }; #define RGE_TIMEOUT 100 @@ -380,7 +380,8 @@ enum rge_mac_type { #define RGE_TXCFG_CONFIG 0x03000700 #define RGE_RXCFG_CONFIG 0x41c00700 -#define RGE_RXCFG_CONFIG_8125B 0x41c00f00 +#define RGE_RXCFG_CONFIG_8125B 0x41c00c00 +#define RGE_RXCFG_CONFIG_8125D 0x41e00c00 #define RGE_RXCFG_CONFIG_8126 0x41e00d00 struct kstat; @@ -608,19 +609,19 @@ static const struct { static const struct { uint16_t reg; uint16_t val; -} rtl8125_mac_cfg3_ephy[] = { +} mac_r25_ephy[] = { { 0x0004, 0xd000 }, { 0x000a, 0x8653 }, { 0x0023, 0xab66 }, { 0x0020, 0x9455 }, { 0x0021, 0x99ff }, { 0x0029, 0xfe04 }, { 0x0044, 0xd000 }, { 0x004a, 0x8653 }, { 0x0063, 0xab66 }, { 0x0060, 0x9455 }, { 0x0061, 0x99ff }, { 0x0069, 0xfe04 } -}, rtl8125_mac_cfg5_ephy[] = { +}, mac_r25b_ephy[] = { { 0x000b, 0xa908 }, { 0x001e, 0x20eb }, { 0x0022, 0x0023 }, { 0x0002, 0x60c2 }, { 0x0029, 0xff00 }, { 0x004b, 0xa908 }, { 0x005e, 0x28eb }, { 0x0062, 0x0023 }, { 0x0042, 0x60c2 }, { 0x0069, 0xff00 } }; -#define RTL8125_MAC_CFG3_MCU \ +#define MAC_R25_MCU \ { 0xa436, 0xa016 }, \ { 0xa438, 0x0000 }, \ { 0xa436, 0xa012 }, \ @@ -1172,7 +1173,7 @@ static const struct { { 0xa436, 0xb878 }, \ { 0xa438, 0x0001 } -#define RTL8125_MAC_CFG5_MCU \ +#define MAC_R25B_MCU \ { 0xa436, 0x8024 }, \ { 0xa438, 0x3701 }, \ { 0xa436, 0xb82e }, \ @@ -1547,10 +1548,10 @@ static const struct { { 0xa438, 0x8887 }, \ { 0xa438, 0xaf88 }, \ { 0xa438, 0x9caf }, \ - { 0xa438, 0x889c }, \ + { 0xa438, 0x88be }, \ { 0xa438, 0xaf88 }, \ - { 0xa438, 0x9caf }, \ - { 0xa438, 0x889c }, \ + { 0xa438, 0xbeaf }, \ + { 0xa438, 0x88be }, \ { 0xa438, 0xbf86 }, \ { 0xa438, 0x49d7 }, \ { 0xa438, 0x0040 }, \ @@ -1854,7 +1855,24 @@ static const struct { { 0xa438, 0x03af }, \ { 0xa438, 0x32e6 }, \ { 0xa438, 0xaf32 }, \ - { 0xa438, 0xfb00 }, \ + { 0xa438, 0xfbee }, \ + { 0xa438, 0x826a }, \ + { 0xa438, 0x0002 }, \ + { 0xa438, 0x88a6 }, \ + { 0xa438, 0xaf04 }, \ + { 0xa438, 0x78f8 }, \ + { 0xa438, 0xfaef }, \ + { 0xa438, 0x69e0 }, \ + { 0xa438, 0x8015 }, \ + { 0xa438, 0xad20 }, \ + { 0xa438, 0x06bf }, \ + { 0xa438, 0x88bb }, \ + { 0xa438, 0x0275 }, \ + { 0xa438, 0xb1ef }, \ + { 0xa438, 0x96fe }, \ + { 0xa438, 0xfc04 }, \ + { 0xa438, 0x00b8 }, \ + { 0xa438, 0x7a00 }, \ { 0xa436, 0xb87c }, \ { 0xa438, 0x8ff6 }, \ { 0xa436, 0xb87e }, \ @@ -1884,7 +1902,7 @@ static const struct { { 0xa436, 0xb864 }, \ { 0xa438, 0x32e3 }, \ { 0xa436, 0xb886 }, \ - { 0xa438, 0xffff }, \ + { 0xa438, 0x0474 }, \ { 0xa436, 0xb888 }, \ { 0xa438, 0xffff }, \ { 0xa436, 0xb88a }, \ @@ -1892,7 +1910,7 @@ static const struct { { 0xa436, 0xb88c }, \ { 0xa438, 0xffff }, \ { 0xa436, 0xb838 }, \ - { 0xa438, 0x000f }, \ + { 0xa438, 0x001f }, \ { 0xb820, 0x0010 }, \ { 0xa436, 0x846e }, \ { 0xa438, 0xaf84 }, \ @@ -1900,13 +1918,13 @@ static const struct { { 0xa438, 0x8690 }, \ { 0xa438, 0xaf86 }, \ { 0xa438, 0xa4af }, \ - { 0xa438, 0x86a4 }, \ - { 0xa438, 0xaf86 }, \ - { 0xa438, 0xa4af }, \ - { 0xa438, 0x86a4 }, \ - { 0xa438, 0xaf86 }, \ - { 0xa438, 0xa4af }, \ - { 0xa438, 0x86a4 }, \ + { 0xa438, 0x8934 }, \ + { 0xa438, 0xaf89 }, \ + { 0xa438, 0x60af }, \ + { 0xa438, 0x897e }, \ + { 0xa438, 0xaf89 }, \ + { 0xa438, 0xa9af }, \ + { 0xa438, 0x89a9 }, \ { 0xa438, 0xee82 }, \ { 0xa438, 0x5f00 }, \ { 0xa438, 0x0284 }, \ @@ -2178,24 +2196,422 @@ static const struct { { 0xa438, 0xaf06 }, \ { 0xa438, 0xa570 }, \ { 0xa438, 0xce42 }, \ + { 0xa438, 0xee83 }, \ + { 0xa438, 0xc800 }, \ + { 0xa438, 0x0286 }, \ + { 0xa438, 0xba02 }, \ + { 0xa438, 0x8728 }, \ + { 0xa438, 0x0287 }, \ + { 0xa438, 0xbe02 }, \ + { 0xa438, 0x87f9 }, \ + { 0xa438, 0x0288 }, \ + { 0xa438, 0xc3af }, \ + { 0xa438, 0x4771 }, \ + { 0xa438, 0xf8f9 }, \ + { 0xa438, 0xfafb }, \ + { 0xa438, 0xef69 }, \ + { 0xa438, 0xfae0 }, \ + { 0xa438, 0x8015 }, \ + { 0xa438, 0xad25 }, \ + { 0xa438, 0x45d2 }, \ + { 0xa438, 0x0002 }, \ + { 0xa438, 0x8714 }, \ + { 0xa438, 0xac4f }, \ + { 0xa438, 0x02ae }, \ + { 0xa438, 0x0bef }, \ + { 0xa438, 0x46f6 }, \ + { 0xa438, 0x273c }, \ + { 0xa438, 0x0400 }, \ + { 0xa438, 0xab26 }, \ + { 0xa438, 0xae30 }, \ + { 0xa438, 0xe08f }, \ + { 0xa438, 0xe9e1 }, \ + { 0xa438, 0x8fea }, \ + { 0xa438, 0x1b46 }, \ + { 0xa438, 0xab26 }, \ + { 0xa438, 0xef32 }, \ + { 0xa438, 0x0c31 }, \ + { 0xa438, 0xbf8f }, \ + { 0xa438, 0xe91a }, \ + { 0xa438, 0x93d8 }, \ + { 0xa438, 0x19d9 }, \ + { 0xa438, 0x1b46 }, \ + { 0xa438, 0xab0a }, \ + { 0xa438, 0x19d8 }, \ + { 0xa438, 0x19d9 }, \ + { 0xa438, 0x1b46 }, \ + { 0xa438, 0xaa02 }, \ + { 0xa438, 0xae0c }, \ + { 0xa438, 0xbf57 }, \ + { 0xa438, 0x1202 }, \ + { 0xa438, 0x58b1 }, \ + { 0xa438, 0xbf57 }, \ + { 0xa438, 0x1202 }, \ + { 0xa438, 0x58a8 }, \ + { 0xa438, 0xfeef }, \ + { 0xa438, 0x96ff }, \ + { 0xa438, 0xfefd }, \ + { 0xa438, 0xfc04 }, \ + { 0xa438, 0xf8fb }, \ + { 0xa438, 0xef79 }, \ + { 0xa438, 0xa200 }, \ + { 0xa438, 0x08bf }, \ + { 0xa438, 0x892e }, \ + { 0xa438, 0x0252 }, \ + { 0xa438, 0xc8ef }, \ + { 0xa438, 0x64ef }, \ + { 0xa438, 0x97ff }, \ + { 0xa438, 0xfc04 }, \ + { 0xa438, 0xf8f9 }, \ + { 0xa438, 0xfafb }, \ + { 0xa438, 0xef69 }, \ + { 0xa438, 0xfae0 }, \ + { 0xa438, 0x8015 }, \ + { 0xa438, 0xad25 }, \ + { 0xa438, 0x50d2 }, \ + { 0xa438, 0x0002 }, \ + { 0xa438, 0x878d }, \ + { 0xa438, 0xac4f }, \ + { 0xa438, 0x02ae }, \ + { 0xa438, 0x0bef }, \ + { 0xa438, 0x46f6 }, \ + { 0xa438, 0x273c }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0xab31 }, \ + { 0xa438, 0xae29 }, \ + { 0xa438, 0xe08f }, \ + { 0xa438, 0xede1 }, \ + { 0xa438, 0x8fee }, \ + { 0xa438, 0x1b46 }, \ + { 0xa438, 0xab1f }, \ + { 0xa438, 0xa200 }, \ + { 0xa438, 0x04ef }, \ + { 0xa438, 0x32ae }, \ + { 0xa438, 0x02d3 }, \ + { 0xa438, 0x010c }, \ + { 0xa438, 0x31bf }, \ + { 0xa438, 0x8fed }, \ + { 0xa438, 0x1a93 }, \ + { 0xa438, 0xd819 }, \ + { 0xa438, 0xd91b }, \ + { 0xa438, 0x46ab }, \ + { 0xa438, 0x0e19 }, \ + { 0xa438, 0xd819 }, \ + { 0xa438, 0xd91b }, \ + { 0xa438, 0x46aa }, \ + { 0xa438, 0x0612 }, \ + { 0xa438, 0xa205 }, \ + { 0xa438, 0xc0ae }, \ + { 0xa438, 0x0cbf }, \ + { 0xa438, 0x5712 }, \ + { 0xa438, 0x0258 }, \ + { 0xa438, 0xb1bf }, \ + { 0xa438, 0x5712 }, \ + { 0xa438, 0x0258 }, \ + { 0xa438, 0xa8fe }, \ + { 0xa438, 0xef96 }, \ + { 0xa438, 0xfffe }, \ + { 0xa438, 0xfdfc }, \ + { 0xa438, 0x04f8 }, \ + { 0xa438, 0xfbef }, \ + { 0xa438, 0x79a2 }, \ + { 0xa438, 0x0005 }, \ + { 0xa438, 0xbf89 }, \ + { 0xa438, 0x1fae }, \ + { 0xa438, 0x1ba2 }, \ + { 0xa438, 0x0105 }, \ + { 0xa438, 0xbf89 }, \ + { 0xa438, 0x22ae }, \ + { 0xa438, 0x13a2 }, \ + { 0xa438, 0x0205 }, \ + { 0xa438, 0xbf89 }, \ + { 0xa438, 0x25ae }, \ + { 0xa438, 0x0ba2 }, \ + { 0xa438, 0x0305 }, \ + { 0xa438, 0xbf89 }, \ + { 0xa438, 0x28ae }, \ + { 0xa438, 0x03bf }, \ + { 0xa438, 0x892b }, \ + { 0xa438, 0x0252 }, \ + { 0xa438, 0xc8ef }, \ + { 0xa438, 0x64ef }, \ + { 0xa438, 0x97ff }, \ + { 0xa438, 0xfc04 }, \ + { 0xa438, 0xf8f9 }, \ + { 0xa438, 0xfaef }, \ + { 0xa438, 0x69fa }, \ + { 0xa438, 0xe080 }, \ + { 0xa438, 0x15ad }, \ + { 0xa438, 0x2628 }, \ + { 0xa438, 0xe081 }, \ + { 0xa438, 0xabe1 }, \ + { 0xa438, 0x81ac }, \ + { 0xa438, 0xef64 }, \ + { 0xa438, 0xbf57 }, \ + { 0xa438, 0x1802 }, \ + { 0xa438, 0x52c8 }, \ + { 0xa438, 0x1b46 }, \ + { 0xa438, 0xaa0a }, \ + { 0xa438, 0xbf57 }, \ + { 0xa438, 0x1b02 }, \ + { 0xa438, 0x52c8 }, \ + { 0xa438, 0x1b46 }, \ + { 0xa438, 0xab0c }, \ + { 0xa438, 0xbf57 }, \ + { 0xa438, 0x1502 }, \ + { 0xa438, 0x58b1 }, \ + { 0xa438, 0xbf57 }, \ + { 0xa438, 0x1502 }, \ + { 0xa438, 0x58a8 }, \ + { 0xa438, 0xfeef }, \ + { 0xa438, 0x96fe }, \ + { 0xa438, 0xfdfc }, \ + { 0xa438, 0x04f8 }, \ + { 0xa438, 0xf9ef }, \ + { 0xa438, 0x59f9 }, \ + { 0xa438, 0xe080 }, \ + { 0xa438, 0x15ad }, \ + { 0xa438, 0x2622 }, \ + { 0xa438, 0xbf53 }, \ + { 0xa438, 0x2202 }, \ + { 0xa438, 0x52c8 }, \ + { 0xa438, 0x3972 }, \ + { 0xa438, 0x9e10 }, \ + { 0xa438, 0xe083 }, \ + { 0xa438, 0xc9ac }, \ + { 0xa438, 0x2605 }, \ + { 0xa438, 0x0288 }, \ + { 0xa438, 0x2cae }, \ + { 0xa438, 0x0d02 }, \ + { 0xa438, 0x8870 }, \ + { 0xa438, 0xae08 }, \ + { 0xa438, 0xe283 }, \ + { 0xa438, 0xc9f6 }, \ + { 0xa438, 0x36e6 }, \ + { 0xa438, 0x83c9 }, \ + { 0xa438, 0xfdef }, \ + { 0xa438, 0x95fd }, \ + { 0xa438, 0xfc04 }, \ + { 0xa438, 0xf8f9 }, \ + { 0xa438, 0xfafb }, \ + { 0xa438, 0xef79 }, \ + { 0xa438, 0xfbbf }, \ + { 0xa438, 0x5718 }, \ + { 0xa438, 0x0252 }, \ + { 0xa438, 0xc8ef }, \ + { 0xa438, 0x64e2 }, \ + { 0xa438, 0x8fe5 }, \ + { 0xa438, 0xe38f }, \ + { 0xa438, 0xe61b }, \ + { 0xa438, 0x659e }, \ + { 0xa438, 0x10e4 }, \ + { 0xa438, 0x8fe5 }, \ + { 0xa438, 0xe58f }, \ + { 0xa438, 0xe6e2 }, \ + { 0xa438, 0x83c9 }, \ + { 0xa438, 0xf636 }, \ + { 0xa438, 0xe683 }, \ + { 0xa438, 0xc9ae }, \ + { 0xa438, 0x13e2 }, \ + { 0xa438, 0x83c9 }, \ + { 0xa438, 0xf736 }, \ + { 0xa438, 0xe683 }, \ + { 0xa438, 0xc902 }, \ + { 0xa438, 0x5820 }, \ + { 0xa438, 0xef57 }, \ + { 0xa438, 0xe68f }, \ + { 0xa438, 0xe7e7 }, \ + { 0xa438, 0x8fe8 }, \ + { 0xa438, 0xffef }, \ + { 0xa438, 0x97ff }, \ + { 0xa438, 0xfefd }, \ + { 0xa438, 0xfc04 }, \ + { 0xa438, 0xf8f9 }, \ + { 0xa438, 0xfafb }, \ + { 0xa438, 0xef79 }, \ + { 0xa438, 0xfbe2 }, \ + { 0xa438, 0x8fe7 }, \ + { 0xa438, 0xe38f }, \ + { 0xa438, 0xe8ef }, \ + { 0xa438, 0x65e2 }, \ + { 0xa438, 0x81b8 }, \ + { 0xa438, 0xe381 }, \ + { 0xa438, 0xb9ef }, \ + { 0xa438, 0x7502 }, \ + { 0xa438, 0x583b }, \ + { 0xa438, 0xac50 }, \ + { 0xa438, 0x1abf }, \ + { 0xa438, 0x5718 }, \ + { 0xa438, 0x0252 }, \ + { 0xa438, 0xc8ef }, \ + { 0xa438, 0x64e2 }, \ + { 0xa438, 0x8fe5 }, \ + { 0xa438, 0xe38f }, \ + { 0xa438, 0xe61b }, \ + { 0xa438, 0x659e }, \ + { 0xa438, 0x1ce4 }, \ + { 0xa438, 0x8fe5 }, \ + { 0xa438, 0xe58f }, \ + { 0xa438, 0xe6ae }, \ + { 0xa438, 0x0cbf }, \ + { 0xa438, 0x5715 }, \ + { 0xa438, 0x0258 }, \ + { 0xa438, 0xb1bf }, \ + { 0xa438, 0x5715 }, \ + { 0xa438, 0x0258 }, \ + { 0xa438, 0xa8e2 }, \ + { 0xa438, 0x83c9 }, \ + { 0xa438, 0xf636 }, \ + { 0xa438, 0xe683 }, \ + { 0xa438, 0xc9ff }, \ + { 0xa438, 0xef97 }, \ + { 0xa438, 0xfffe }, \ + { 0xa438, 0xfdfc }, \ + { 0xa438, 0x04f8 }, \ + { 0xa438, 0xf9fa }, \ + { 0xa438, 0xef69 }, \ + { 0xa438, 0xe080 }, \ + { 0xa438, 0x15ad }, \ + { 0xa438, 0x264b }, \ + { 0xa438, 0xbf53 }, \ + { 0xa438, 0xca02 }, \ + { 0xa438, 0x52c8 }, \ + { 0xa438, 0xad28 }, \ + { 0xa438, 0x42bf }, \ + { 0xa438, 0x8931 }, \ + { 0xa438, 0x0252 }, \ + { 0xa438, 0xc8ef }, \ + { 0xa438, 0x54bf }, \ + { 0xa438, 0x576c }, \ + { 0xa438, 0x0252 }, \ + { 0xa438, 0xc8a1 }, \ + { 0xa438, 0x001b }, \ + { 0xa438, 0xbf53 }, \ + { 0xa438, 0x4c02 }, \ + { 0xa438, 0x52c8 }, \ + { 0xa438, 0xac29 }, \ + { 0xa438, 0x0dac }, \ + { 0xa438, 0x2805 }, \ + { 0xa438, 0xa302 }, \ + { 0xa438, 0x16ae }, \ + { 0xa438, 0x20a3 }, \ + { 0xa438, 0x0311 }, \ + { 0xa438, 0xae1b }, \ + { 0xa438, 0xa304 }, \ + { 0xa438, 0x0cae }, \ + { 0xa438, 0x16a3 }, \ + { 0xa438, 0x0802 }, \ + { 0xa438, 0xae11 }, \ + { 0xa438, 0xa309 }, \ + { 0xa438, 0x02ae }, \ + { 0xa438, 0x0cbf }, \ + { 0xa438, 0x5715 }, \ + { 0xa438, 0x0258 }, \ + { 0xa438, 0xb1bf }, \ + { 0xa438, 0x5715 }, \ + { 0xa438, 0x0258 }, \ + { 0xa438, 0xa8ef }, \ + { 0xa438, 0x96fe }, \ + { 0xa438, 0xfdfc }, \ + { 0xa438, 0x04f0 }, \ + { 0xa438, 0xa300 }, \ + { 0xa438, 0xf0a3 }, \ + { 0xa438, 0x02f0 }, \ + { 0xa438, 0xa304 }, \ + { 0xa438, 0xf0a3 }, \ + { 0xa438, 0x06f0 }, \ + { 0xa438, 0xa308 }, \ + { 0xa438, 0xf0a2 }, \ + { 0xa438, 0x8074 }, \ + { 0xa438, 0xa600 }, \ + { 0xa438, 0xac4f }, \ + { 0xa438, 0x02ae }, \ + { 0xa438, 0x0bef }, \ + { 0xa438, 0x46f6 }, \ + { 0xa438, 0x273c }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0xab1b }, \ + { 0xa438, 0xae16 }, \ + { 0xa438, 0xe081 }, \ + { 0xa438, 0xabe1 }, \ + { 0xa438, 0x81ac }, \ + { 0xa438, 0x1b46 }, \ + { 0xa438, 0xab0c }, \ + { 0xa438, 0xac32 }, \ + { 0xa438, 0x04ef }, \ + { 0xa438, 0x32ae }, \ + { 0xa438, 0x02d3 }, \ + { 0xa438, 0x04af }, \ + { 0xa438, 0x486c }, \ + { 0xa438, 0xaf48 }, \ + { 0xa438, 0x82af }, \ + { 0xa438, 0x4888 }, \ + { 0xa438, 0xe081 }, \ + { 0xa438, 0x9be1 }, \ + { 0xa438, 0x819c }, \ + { 0xa438, 0xe28f }, \ + { 0xa438, 0xe3ad }, \ + { 0xa438, 0x3009 }, \ + { 0xa438, 0x1f55 }, \ + { 0xa438, 0xe38f }, \ + { 0xa438, 0xe20c }, \ + { 0xa438, 0x581a }, \ + { 0xa438, 0x45e4 }, \ + { 0xa438, 0x83a6 }, \ + { 0xa438, 0xe583 }, \ + { 0xa438, 0xa7af }, \ + { 0xa438, 0x2a75 }, \ + { 0xa438, 0xe08f }, \ + { 0xa438, 0xe3ad }, \ + { 0xa438, 0x201c }, \ + { 0xa438, 0x1f44 }, \ + { 0xa438, 0xe18f }, \ + { 0xa438, 0xe10c }, \ + { 0xa438, 0x44ef }, \ + { 0xa438, 0x64e0 }, \ + { 0xa438, 0x8232 }, \ + { 0xa438, 0xe182 }, \ + { 0xa438, 0x331b }, \ + { 0xa438, 0x649f }, \ + { 0xa438, 0x091f }, \ + { 0xa438, 0x44e1 }, \ + { 0xa438, 0x8fe2 }, \ + { 0xa438, 0x0c48 }, \ + { 0xa438, 0x1b54 }, \ + { 0xa438, 0xe683 }, \ + { 0xa438, 0xa6e7 }, \ + { 0xa438, 0x83a7 }, \ + { 0xa438, 0xaf2b }, \ + { 0xa438, 0xd900 }, \ { 0xa436, 0xb818 }, \ { 0xa438, 0x043d }, \ { 0xa436, 0xb81a }, \ { 0xa438, 0x06a3 }, \ { 0xa436, 0xb81c }, \ - { 0xa438, 0xffff }, \ + { 0xa438, 0x476d }, \ { 0xa436, 0xb81e }, \ - { 0xa438, 0xffff }, \ + { 0xa438, 0x4852 }, \ { 0xa436, 0xb850 }, \ - { 0xa438, 0xffff }, \ + { 0xa438, 0x2a69 }, \ { 0xa436, 0xb852 }, \ - { 0xa438, 0xffff }, \ + { 0xa438, 0x2bd3 }, \ { 0xa436, 0xb878 }, \ { 0xa438, 0xffff }, \ { 0xa436, 0xb884 }, \ { 0xa438, 0xffff }, \ { 0xa436, 0xb832 }, \ - { 0xa438, 0x0003 }, \ + { 0xa438, 0x003f }, \ + { 0xb844, 0xffff }, \ + { 0xa436, 0x8fe9 }, \ + { 0xa438, 0x0000 }, \ + { 0xa436, 0x8feb }, \ + { 0xa438, 0x02fe }, \ + { 0xa436, 0x8fed }, \ + { 0xa438, 0x0019 }, \ + { 0xa436, 0x8fef }, \ + { 0xa438, 0x0bdb }, \ + { 0xa436, 0x8ff1 }, \ + { 0xa438, 0x0ca4 }, \ { 0xa436, 0x0000 }, \ { 0xa438, 0x0000 }, \ { 0xa436, 0xb82e }, \ @@ -2203,10 +2619,3253 @@ static const struct { { 0xa436, 0x8024 }, \ { 0xa438, 0x0000 }, \ { 0xa436, 0x801e }, \ - { 0xa438, 0x0021 }, \ + { 0xa438, 0x0024 }, \ + { 0xb820, 0x0000 } + +#define MAC_R25D_MCU \ + { 0xa436, 0x8023 }, \ + { 0xa438, 0x3800 }, \ + { 0xa436, 0xb82e }, \ + { 0xa438, 0x0001 }, \ + { 0xb820, 0x0090 }, \ + { 0xa436, 0xa016 }, \ + { 0xa438, 0x0000 }, \ + { 0xa436, 0xa012 }, \ + { 0xa438, 0x0000 }, \ + { 0xa436, 0xa014 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x8010 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x8018 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x8021 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x8029 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x8031 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x8035 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x819c }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x81e9 }, \ + { 0xa438, 0xd711 }, \ + { 0xa438, 0x6081 }, \ + { 0xa438, 0x8904 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x2021 }, \ + { 0xa438, 0xa904 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x2021 }, \ + { 0xa438, 0xd75f }, \ + { 0xa438, 0x4083 }, \ + { 0xa438, 0xd503 }, \ + { 0xa438, 0xa908 }, \ + { 0xa438, 0x87f0 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x17e0 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x13c3 }, \ + { 0xa438, 0xd707 }, \ + { 0xa438, 0x2005 }, \ + { 0xa438, 0x8027 }, \ + { 0xa438, 0xd75e }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x1434 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x14a5 }, \ + { 0xa438, 0xc504 }, \ + { 0xa438, 0xce20 }, \ + { 0xa438, 0xcf01 }, \ + { 0xa438, 0xd70a }, \ + { 0xa438, 0x4005 }, \ + { 0xa438, 0xcf02 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x1c50 }, \ + { 0xa438, 0xa980 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x14f3 }, \ + { 0xa438, 0xd75e }, \ + { 0xa438, 0x67b1 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xd71e }, \ + { 0xa438, 0x65bb }, \ + { 0xa438, 0x63da }, \ + { 0xa438, 0x61f9 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0c10 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0808 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0470 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0430 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0410 }, \ + { 0xa438, 0xf02a }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0c20 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0804 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0470 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0430 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0420 }, \ + { 0xa438, 0xf01c }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0c40 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0802 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0470 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0450 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0440 }, \ + { 0xa438, 0xf00e }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0c80 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0801 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x04b0 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0490 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0480 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0xc48e }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5faf }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0x8e01 }, \ + { 0xa438, 0x8c0f }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x17e0 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x4074 }, \ + { 0xa438, 0x6195 }, \ + { 0xa438, 0xf005 }, \ + { 0xa438, 0x60f5 }, \ + { 0xa438, 0x0c03 }, \ + { 0xa438, 0x0d00 }, \ + { 0xa438, 0xf009 }, \ + { 0xa438, 0x0c03 }, \ + { 0xa438, 0x0d01 }, \ + { 0xa438, 0xf006 }, \ + { 0xa438, 0x0c03 }, \ + { 0xa438, 0x0d02 }, \ + { 0xa438, 0xf003 }, \ + { 0xa438, 0x0c03 }, \ + { 0xa438, 0x0d03 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0xd706 }, \ + { 0xa438, 0x2529 }, \ + { 0xa438, 0x809c }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x607b }, \ + { 0xa438, 0x40da }, \ + { 0xa438, 0xf00f }, \ + { 0xa438, 0x431a }, \ + { 0xa438, 0xf021 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x617b }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1ad1 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x608e }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0x5f34 }, \ + { 0xa438, 0xf020 }, \ + { 0xa438, 0xf053 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1ad1 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x608e }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0x5f34 }, \ + { 0xa438, 0xf023 }, \ + { 0xa438, 0xf067 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1ad1 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x608e }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0x5f34 }, \ + { 0xa438, 0xf026 }, \ + { 0xa438, 0xf07b }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1ad1 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x608e }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0x5f34 }, \ + { 0xa438, 0xf029 }, \ + { 0xa438, 0xf08f }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x8173 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0x7fb4 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x8188 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5fae }, \ + { 0xa438, 0xf028 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x8173 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0x7fb4 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x8188 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5fae }, \ + { 0xa438, 0xf039 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x8173 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0x7fb4 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x8188 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5fae }, \ + { 0xa438, 0xf04a }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x8173 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0x7fb4 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x8188 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5fae }, \ + { 0xa438, 0xf05b }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4119 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xac01 }, \ + { 0xa438, 0xae01 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a2f }, \ + { 0xa438, 0xf00a }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4118 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xac11 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0xa410 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5fb0 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4079 }, \ + { 0xa438, 0xa80f }, \ + { 0xa438, 0xf05d }, \ + { 0xa438, 0x4b98 }, \ + { 0xa438, 0xa808 }, \ + { 0xa438, 0xf05a }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4119 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xac02 }, \ + { 0xa438, 0xae01 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a2f }, \ + { 0xa438, 0xf00a }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4118 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xac22 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0xa420 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5fb0 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4079 }, \ + { 0xa438, 0xa80f }, \ + { 0xa438, 0xf03f }, \ + { 0xa438, 0x47d8 }, \ + { 0xa438, 0xa804 }, \ + { 0xa438, 0xf03c }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4119 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xac04 }, \ + { 0xa438, 0xae01 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a2f }, \ + { 0xa438, 0xf00a }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4118 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xac44 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0xa440 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5fb0 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4079 }, \ + { 0xa438, 0xa80f }, \ + { 0xa438, 0xf021 }, \ + { 0xa438, 0x4418 }, \ + { 0xa438, 0xa802 }, \ + { 0xa438, 0xf01e }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4119 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xac08 }, \ + { 0xa438, 0xae01 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a2f }, \ + { 0xa438, 0xf00a }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4118 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xac88 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0xa480 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1000 }, \ + { 0xa438, 0x1a41 }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x5fb0 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0xd719 }, \ + { 0xa438, 0x4079 }, \ + { 0xa438, 0xa80f }, \ + { 0xa438, 0xf003 }, \ + { 0xa438, 0x4058 }, \ + { 0xa438, 0xa801 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x16ed }, \ + { 0xa438, 0xd73e }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x3088 }, \ + { 0xa438, 0x817a }, \ + { 0xa438, 0x6193 }, \ + { 0xa438, 0x6132 }, \ + { 0xa438, 0x60d1 }, \ + { 0xa438, 0x3298 }, \ + { 0xa438, 0x8185 }, \ + { 0xa438, 0xf00a }, \ + { 0xa438, 0xa808 }, \ + { 0xa438, 0xf008 }, \ + { 0xa438, 0xa804 }, \ + { 0xa438, 0xf006 }, \ + { 0xa438, 0xa802 }, \ + { 0xa438, 0xf004 }, \ + { 0xa438, 0xa801 }, \ + { 0xa438, 0xf002 }, \ + { 0xa438, 0xa80f }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x0800 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0xd75e }, \ + { 0xa438, 0x6211 }, \ + { 0xa438, 0xd71e }, \ + { 0xa438, 0x619b }, \ + { 0xa438, 0x611a }, \ + { 0xa438, 0x6099 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0808 }, \ + { 0xa438, 0xf009 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0804 }, \ + { 0xa438, 0xf006 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0802 }, \ + { 0xa438, 0xf003 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0801 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x0800 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0xc48d }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0x8d03 }, \ + { 0xa438, 0xd701 }, \ + { 0xa438, 0x4045 }, \ + { 0xa438, 0xad02 }, \ + { 0xa438, 0xd504 }, \ + { 0xa438, 0xd706 }, \ + { 0xa438, 0x2529 }, \ + { 0xa438, 0x81ad }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x607b }, \ + { 0xa438, 0x40da }, \ + { 0xa438, 0xf013 }, \ + { 0xa438, 0x441a }, \ + { 0xa438, 0xf02d }, \ + { 0xa438, 0xd718 }, \ + { 0xa438, 0x61fb }, \ + { 0xa438, 0xbb01 }, \ + { 0xa438, 0xd75e }, \ + { 0xa438, 0x6171 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0c10 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0410 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0808 }, \ + { 0xa438, 0xf02a }, \ + { 0xa438, 0xbb02 }, \ + { 0xa438, 0xd75e }, \ + { 0xa438, 0x6171 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0c20 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0420 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0804 }, \ + { 0xa438, 0xf01c }, \ + { 0xa438, 0xbb04 }, \ + { 0xa438, 0xd75e }, \ + { 0xa438, 0x6171 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0c40 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0440 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0802 }, \ + { 0xa438, 0xf00e }, \ + { 0xa438, 0xbb08 }, \ + { 0xa438, 0xd75e }, \ + { 0xa438, 0x6171 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0c80 }, \ + { 0xa438, 0xd501 }, \ + { 0xa438, 0xce01 }, \ + { 0xa438, 0x0cf0 }, \ + { 0xa438, 0x0480 }, \ + { 0xa438, 0xce00 }, \ + { 0xa438, 0xd505 }, \ + { 0xa438, 0x0c0f }, \ + { 0xa438, 0x0801 }, \ + { 0xa438, 0xd500 }, \ + { 0xa438, 0x1800 }, \ + { 0xa438, 0x1616 }, \ + { 0xa436, 0xa026 }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xa024 }, \ + { 0xa438, 0x15d8 }, \ + { 0xa436, 0xa022 }, \ + { 0xa438, 0x161f }, \ + { 0xa436, 0xa020 }, \ + { 0xa438, 0x14f2 }, \ + { 0xa436, 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}, \ + { 0xa438, 0x52ff }, \ + { 0xa438, 0xef97 }, \ + { 0xa438, 0xfc04 }, \ + { 0xa438, 0xf8e0 }, \ + { 0xa438, 0x8040 }, \ + { 0xa438, 0xf625 }, \ + { 0xa438, 0xe480 }, \ + { 0xa438, 0x40fc }, \ + { 0xa438, 0x04f8 }, \ + { 0xa438, 0xe080 }, \ + { 0xa438, 0x4cf6 }, \ + { 0xa438, 0x25e4 }, \ + { 0xa438, 0x804c }, \ + { 0xa438, 0xfc04 }, \ + { 0xa438, 0x55a4 }, \ + { 0xa438, 0xbaf0 }, \ + { 0xa438, 0xa64a }, \ + { 0xa438, 0xf0a6 }, \ + { 0xa438, 0x4cf0 }, \ + { 0xa438, 0xa64e }, \ + { 0xa438, 0x66a4 }, \ + { 0xa438, 0xb655 }, \ + { 0xa438, 0xa4b6 }, \ + { 0xa438, 0x00ac }, \ + { 0xa438, 0x0e66 }, \ + { 0xa438, 0xac0e }, \ + { 0xa438, 0xee80 }, \ + { 0xa438, 0x4c3a }, \ + { 0xa438, 0xaf07 }, \ + { 0xa438, 0xd0af }, \ + { 0xa438, 0x26d0 }, \ + { 0xa438, 0xa201 }, \ + { 0xa438, 0x0ebf }, \ + { 0xa438, 0x663d }, \ + { 0xa438, 0x026b }, \ + { 0xa438, 0x52bf }, \ + { 0xa438, 0x6643 }, \ + { 0xa438, 0x026b }, \ + { 0xa438, 0x52ae }, \ + { 0xa438, 0x11bf }, \ + { 0xa438, 0x6643 }, \ + { 0xa438, 0x026b }, \ + { 0xa438, 0x5bd4 }, \ + { 0xa438, 0x0054 }, \ + { 0xa438, 0xb4fe }, \ + { 0xa438, 0xbf66 }, \ + { 0xa438, 0x3d02 }, \ + { 0xa438, 0x6b5b }, \ + { 0xa438, 0xd300 }, \ + { 0xa438, 0x020d }, \ + { 0xa438, 0xf6a2 }, \ + { 0xa438, 0x0405 }, \ + { 0xa438, 0xe081 }, \ + { 0xa438, 0x47ae }, \ + { 0xa438, 0x03e0 }, \ + { 0xa438, 0x8148 }, \ + { 0xa438, 0xac23 }, \ + { 0xa438, 0x02ae }, \ + { 0xa438, 0x0268 }, \ + { 0xa438, 0xf01a }, \ + { 0xa438, 0x10ad }, \ + { 0xa438, 0x2f04 }, \ + { 0xa438, 0xd100 }, \ + { 0xa438, 0xae05 }, \ + { 0xa438, 0xad2c }, \ + { 0xa438, 0x02d1 }, \ + { 0xa438, 0x0f1f }, \ + { 0xa438, 0x00a2 }, \ + { 0xa438, 0x0407 }, \ + { 0xa438, 0x3908 }, \ + { 0xa438, 0xad2f }, \ + { 0xa438, 0x02d1 }, \ + { 0xa438, 0x0002 }, \ + { 0xa438, 0x0e1c }, \ + { 0xa438, 0x2b01 }, \ + { 0xa438, 0xad3a }, \ + { 0xa438, 0xc9af }, \ + { 0xa438, 0x0dee }, \ + { 0xa438, 0xa000 }, \ + { 0xa438, 0x2702 }, \ + { 0xa438, 0x1beb }, \ + { 0xa438, 0xe18f }, \ + { 0xa438, 0xe1ac }, \ + { 0xa438, 0x2819 }, \ + { 0xa438, 0xee8f }, \ + { 0xa438, 0xe101 }, \ + { 0xa438, 0x1f44 }, \ + { 0xa438, 0xbf65 }, \ + { 0xa438, 0x9302 }, \ + { 0xa438, 0x6b9d }, \ + { 0xa438, 0xe58f }, \ + { 0xa438, 0xe21f }, \ + { 0xa438, 0x44d1 }, \ + { 0xa438, 0x02bf }, \ + { 0xa438, 0x6593 }, \ + { 0xa438, 0x026b }, \ + { 0xa438, 0x7ee0 }, \ + { 0xa438, 0x82b1 }, \ + { 0xa438, 0xae49 }, \ + { 0xa438, 0xa001 }, \ + { 0xa438, 0x0502 }, \ + { 0xa438, 0x1c4d }, \ + { 0xa438, 0xae41 }, \ + { 0xa438, 0xa002 }, \ + { 0xa438, 0x0502 }, \ + { 0xa438, 0x1c90 }, \ + { 0xa438, 0xae39 }, \ + { 0xa438, 0xa003 }, \ + { 0xa438, 0x0502 }, \ + { 0xa438, 0x1c9d }, \ + { 0xa438, 0xae31 }, \ + { 0xa438, 0xa004 }, \ + { 0xa438, 0x0502 }, \ + { 0xa438, 0x1cbc }, \ + { 0xa438, 0xae29 }, \ + { 0xa438, 0xa005 }, \ + { 0xa438, 0x1e02 }, \ + { 0xa438, 0x1cc9 }, \ + { 0xa438, 0xe080 }, \ + { 0xa438, 0xdfac }, \ + { 0xa438, 0x2013 }, \ + { 0xa438, 0xac21 }, \ + { 0xa438, 0x10ac }, \ + { 0xa438, 0x220d }, \ + { 0xa438, 0xe18f }, \ + { 0xa438, 0xe2bf }, \ + { 0xa438, 0x6593 }, \ + { 0xa438, 0x026b }, \ + { 0xa438, 0x7eee }, \ + { 0xa438, 0x8fe1 }, \ + { 0xa438, 0x00ae }, \ + { 0xa438, 0x08a0 }, \ + { 0xa438, 0x0605 }, \ + { 0xa438, 0x021d }, \ + { 0xa438, 0x07ae }, \ + { 0xa438, 0x00e0 }, \ + { 0xa438, 0x82b1 }, \ + { 0xa438, 0xaf1b }, \ + { 0xa438, 0xe910 }, \ + { 0xa438, 0xbf4a }, \ + { 0xa438, 0x99bf }, \ + { 0xa438, 0x4a00 }, \ + { 0xa438, 0xa86a }, \ + { 0xa438, 0xfdad }, \ + { 0xa438, 0x5eca }, \ + { 0xa438, 0xad5e }, \ + { 0xa438, 0x88bd }, \ + { 0xa438, 0x2c99 }, \ + { 0xa438, 0xbd2c }, \ + { 0xa438, 0x33bd }, \ + { 0xa438, 0x3222 }, \ + { 0xa438, 0xbd32 }, \ + { 0xa438, 0x11bd }, \ + { 0xa438, 0x3200 }, \ + { 0xa438, 0xbd32 }, \ + { 0xa438, 0x77bd }, \ + { 0xa438, 0x3266 }, \ + { 0xa438, 0xbd32 }, \ + { 0xa438, 0x55bd }, \ + { 0xa438, 0x3244 }, \ + { 0xa438, 0xbd32 }, \ + { 0xa436, 0xb818 }, \ + { 0xa438, 0x15c5 }, \ + { 0xa436, 0xb81a }, \ + { 0xa438, 0x6255 }, \ + { 0xa436, 0xb81c }, \ + { 0xa438, 0x34e1 }, \ + { 0xa436, 0xb81e }, \ + { 0xa438, 0x1068 }, \ + { 0xa436, 0xb850 }, \ + { 0xa438, 0x07cc }, \ + { 0xa436, 0xb852 }, \ + { 0xa438, 0x26ca }, \ + { 0xa436, 0xb878 }, \ + { 0xa438, 0x0dbf }, \ + { 0xa436, 0xb884 }, \ + { 0xa438, 0x1bb1 }, \ + { 0xa436, 0xb832 }, \ + { 0xa438, 0x00ff }, \ + { 0xa436, 0x0000 }, \ + { 0xa438, 0x0000 }, \ + { 0xb82e, 0x0000 }, \ + { 0xa436, 0x8023 }, \ + { 0xa438, 0x0000 }, \ + { 0xa436, 0x801e }, \ + { 0xa438, 0x0031 }, \ + { 0xb820, 0x0000 }, \ + { 0xb892, 0x0000 }, \ + { 0xb88e, 0xc28f }, \ + { 0xb890, 0x252d }, \ + { 0xb88e, 0xc290 }, \ + { 0xb890, 0xc924 }, \ + { 0xb88e, 0xc291 }, \ + { 0xb890, 0xc92e }, \ + { 0xb88e, 0xc292 }, \ + { 0xb890, 0xf626 }, \ + { 0xb88e, 0xc293 }, \ + { 0xb890, 0xf630 }, \ + { 0xb88e, 0xc294 }, \ + { 0xb890, 0xa328 }, \ + { 0xb88e, 0xc295 }, \ + { 0xb890, 0xa332 }, \ + { 0xb88e, 0xc296 }, \ + { 0xb890, 0xd72b }, \ + { 0xb88e, 0xc297 }, \ + { 0xb890, 0xd735 }, \ + { 0xb88e, 0xc298 }, \ + { 0xb890, 0x8a2e }, \ + { 0xb88e, 0xc299 }, \ + { 0xb890, 0x8a38 }, \ + { 0xb88e, 0xc29a }, \ + { 0xb890, 0xbe32 }, \ + { 0xb88e, 0xc29b }, \ + { 0xb890, 0xbe3c }, \ + { 0xb88e, 0xc29c }, \ + { 0xb890, 0x7436 }, \ + { 0xb88e, 0xc29d }, \ + { 0xb890, 0x7440 }, \ + { 0xb88e, 0xc29e }, \ + { 0xb890, 0xad3b }, \ + { 0xb88e, 0xc29f }, \ + { 0xb890, 0xad45 }, \ + { 0xb88e, 0xc2a0 }, \ + { 0xb890, 0x6640 }, \ + { 0xb88e, 0xc2a1 }, \ + { 0xb890, 0x664a }, \ + { 0xb88e, 0xc2a2 }, \ + { 0xb890, 0xa646 }, \ + { 0xb88e, 0xc2a3 }, \ + { 0xb890, 0xa650 }, \ + { 0xb88e, 0xc2a4 }, \ + { 0xb890, 0x624c }, \ + { 0xb88e, 0xc2a5 }, \ + { 0xb890, 0x6256 }, \ + { 0xb88e, 0xc2a6 }, \ + { 0xb890, 0xa453 }, \ + { 0xb88e, 0xc2a7 }, \ + { 0xb890, 0xa45d }, \ + { 0xb88e, 0xc2a8 }, \ + { 0xb890, 0x665a }, \ + { 0xb88e, 0xc2a9 }, \ + { 0xb890, 0x6664 }, \ + { 0xb88e, 0xc2aa }, \ + { 0xb890, 0xac62 }, \ + { 0xb88e, 0xc2ab }, \ + { 0xb890, 0xac6c }, \ + { 0xb88e, 0xc2ac }, \ + { 0xb890, 0x746a }, \ + { 0xb88e, 0xc2ad }, \ + { 0xb890, 0x7474 }, \ + { 0xb88e, 0xc2ae }, \ + { 0xb890, 0xbcfa }, \ + { 0xb88e, 0xc2af }, \ + { 0xb890, 0xbcfd }, \ + { 0xb88e, 0xc2b0 }, \ + { 0xb890, 0x79ff }, \ + { 0xb88e, 0xc2b1 }, \ + { 0xb890, 0x7901 }, \ + { 0xb88e, 0xc2b2 }, \ + { 0xb890, 0xf703 }, \ + { 0xb88e, 0xc2b3 }, \ + { 0xb890, 0xf706 }, \ + { 0xb88e, 0xc2b4 }, \ + { 0xb890, 0x7408 }, \ + { 0xb88e, 0xc2b5 }, \ + { 0xb890, 0x740a }, \ + { 0xb88e, 0xc2b6 }, \ + { 0xb890, 0xf10c }, \ + { 0xb88e, 0xc2b7 }, \ + { 0xb890, 0xf10f }, \ + { 0xb88e, 0xc2b8 }, \ + { 0xb890, 0x6f10 }, \ + { 0xb88e, 0xc2b9 }, \ + { 0xb890, 0x6f13 }, \ + { 0xb88e, 0xc2ba }, \ + { 0xb890, 0xec15 }, \ + { 0xb88e, 0xc2bb }, \ + { 0xb890, 0xec18 }, \ + { 0xb88e, 0xc2bc }, \ + { 0xb890, 0x6a1a }, \ + { 0xb88e, 0xc2bd }, \ + { 0xb890, 0x6a1c }, \ + { 0xb88e, 0xc2be }, \ + { 0xb890, 0xe71e }, \ + { 0xb88e, 0xc2bf }, \ + { 0xb890, 0xe721 }, \ + { 0xb88e, 0xc2c0 }, \ + { 0xb890, 0x6424 }, \ + { 0xb88e, 0xc2c1 }, \ + { 0xb890, 0x6425 }, \ + { 0xb88e, 0xc2c2 }, \ + { 0xb890, 0xe228 }, \ + { 0xb88e, 0xc2c3 }, \ + { 0xb890, 0xe22a }, \ + { 0xb88e, 0xc2c4 }, \ + { 0xb890, 0x5f2b }, \ + { 0xb88e, 0xc2c5 }, \ + { 0xb890, 0x5f2e }, \ + { 0xb88e, 0xc2c6 }, \ + { 0xb890, 0xdc31 }, \ + { 0xb88e, 0xc2c7 }, \ + { 0xb890, 0xdc33 }, \ + { 0xb88e, 0xc2c8 }, \ + { 0xb890, 0x2035 }, \ + { 0xb88e, 0xc2c9 }, \ + { 0xb890, 0x2036 }, \ + { 0xb88e, 0xc2ca }, \ + { 0xb890, 0x9f3a }, \ + { 0xb88e, 0xc2cb }, \ + { 0xb890, 0x9f3a }, \ + { 0xb88e, 0xc2cc }, \ + { 0xb890, 0x4430 }, \ + { 0xa436, 0xacca }, \ + { 0xa438, 0x0104 }, \ + { 0xa436, 0xaccc }, \ + { 0xa438, 0x8000 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0fff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfd47 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0fff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xe56f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01c0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xed97 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01c8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xf5bf }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01d0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb07 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb0f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01d8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa087 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0180 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa00f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0108 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa807 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0100 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa88f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0188 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb027 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0120 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb02f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0128 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb847 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0140 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb84f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0148 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb17 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb1f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa017 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0110 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa01f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0118 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa837 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0130 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa83f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0138 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb097 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0190 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb05f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0158 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb857 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0150 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb89f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0198 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb27 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb2f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x8087 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0180 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x800f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0108 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x8807 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0100 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x888f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0188 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x9027 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0120 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x902f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0128 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x9847 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0140 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x984f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0148 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa0a7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa8af }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa067 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0161 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xa86f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0169 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb37 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb3f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x8017 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0110 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x801f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0118 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x8837 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0130 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x883f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0138 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x9097 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0190 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x905f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0158 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x9857 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0150 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x989f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0198 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb0b7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb8bf }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb077 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0171 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xb87f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0179 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb47 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb4f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6087 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0180 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x600f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0108 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6807 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0100 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x688f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0188 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7027 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0120 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x702f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0128 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7847 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0140 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x784f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0148 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x80a7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x88af }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x8067 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0161 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x886f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0169 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb57 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb5f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6017 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0110 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x601f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0118 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6837 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0130 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x683f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0138 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7097 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0190 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x705f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0158 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7857 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0150 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x789f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0198 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x90b7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x98bf }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x9077 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0171 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x987f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0179 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb67 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb6f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x4087 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0180 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x400f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0108 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x4807 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0100 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x488f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0188 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x5027 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0120 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x502f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0128 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x5847 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0140 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x584f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0148 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x60a7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x68af }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6067 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0161 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x686f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0169 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb77 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb7f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x4017 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0110 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x401f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0118 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x4837 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0130 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x483f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0138 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x5097 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0190 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x505f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0158 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x5857 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0150 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x589f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0198 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x70b7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x78bf }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7077 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0171 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x787f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0179 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb87 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb8f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x40a7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x48af }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x4067 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0161 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x486f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0169 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb97 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb9f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x50b7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x58bf }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x5077 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0171 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x587f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0179 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfba7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfbaf }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x2067 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0161 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x286f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0169 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfbb7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfbbf }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x3077 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0171 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x387f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0179 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfff9 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x17ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfff9 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x17ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0fff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfff8 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0fff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xffff }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb47 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb4f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6087 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0180 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x600f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0108 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6807 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0100 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x688f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0188 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7027 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0120 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x702f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0128 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7847 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0140 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x784f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0148 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x80a7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x88af }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01a8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x8067 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0161 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x886f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0169 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb57 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0xfb5f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x07ff }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6017 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0110 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x601f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0118 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x6837 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0130 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x683f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0138 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7097 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0190 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x705f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0158 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x7857 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0150 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x789f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x0198 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x90b7 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b0 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x98bf }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x01b8 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x9077 }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x1171 }, \ + { 0xa436, 0xacce }, \ + { 0xa438, 0x987f }, \ + { 0xa436, 0xacd0 }, \ + { 0xa438, 0x1179 }, \ + { 0xa436, 0xacca }, \ + { 0xa438, 0x0004 }, \ + { 0xa436, 0xacc6 }, \ + { 0xa438, 0x0008 }, \ + { 0xa436, 0xacc8 }, \ + { 0xa438, 0xc000 }, \ + { 0xa436, 0xacc6 }, \ + { 0xa438, 0x0015 }, \ + { 0xa436, 0xacc8 }, \ + { 0xa438, 0xc043 }, \ + { 0xa436, 0xacc8 }, \ + { 0xa438, 0x0000 }, \ { 0xb820, 0x0000 } -#define RTL8126_MAC_CFG2_MCU \ +#define MAC_R26_MCU \ { 0xa436, 0x8023 }, \ { 0xa438, 0x4700 }, \ { 0xa436, 0xb82e }, \