From: Jonathan Matthew Subject: ixl: remove IXL_MAX_VECTORS To: tech@openbsd.org Cc: bluhm@openbsd.org Date: Thu, 20 Nov 2025 15:53:14 +1000 We can get the actual number of queues assigned to the nic from the I40E_PFLAN_QALLOC register. The 1536 value we're currently using is actually the number of queue pairs available across the whole chip, so for a 4 port card we should have 384 for each PF. PFs are also limited to 129 MSI-X vectors each, so we're not likely to ever run into the queue pair limit. ok? Index: if_ixl.c =================================================================== RCS file: /cvs/src/sys/dev/pci/if_ixl.c,v diff -u -p -r1.112 if_ixl.c --- if_ixl.c 11 Nov 2025 17:43:18 -0000 1.112 +++ if_ixl.c 20 Nov 2025 03:25:16 -0000 @@ -100,8 +100,6 @@ #define CACHE_LINE_SIZE 64 #endif -#define IXL_MAX_VECTORS 1536 - #define I40E_MASK(mask, shift) ((mask) << (shift)) #define I40E_PF_RESET_WAIT_COUNT 200 #define I40E_AQ_LARGE_BUF 512 @@ -1641,7 +1639,7 @@ ixl_attach(struct device *parent, struct struct ifnet *ifp = &sc->sc_ac.ac_if; struct pci_attach_args *pa = aux; pcireg_t memtype; - uint32_t port, ari, func; + uint32_t port, ari, func, val; uint64_t phy_types = 0; unsigned int nqueues, i; int tries; @@ -1665,9 +1663,11 @@ ixl_attach(struct device *parent, struct return; } - sc->sc_base_queue = (ixl_rd(sc, I40E_PFLAN_QALLOC) & - I40E_PFLAN_QALLOC_FIRSTQ_MASK) >> + val = ixl_rd(sc, I40E_PFLAN_QALLOC); + sc->sc_base_queue = (val & I40E_PFLAN_QALLOC_FIRSTQ_MASK) >> I40E_PFLAN_QALLOC_FIRSTQ_SHIFT; + nqueues = ((val & I40E_PFLAN_QALLOC_LASTQ_MASK) >> + I40E_PFLAN_QALLOC_LASTQ_SHIFT) - sc->sc_base_queue; ixl_clear_hw(sc); if (ixl_pf_reset(sc) == -1) { @@ -1781,7 +1781,7 @@ ixl_attach(struct device *parent, struct nmsix--; sc->sc_intrmap = intrmap_create(&sc->sc_dev, nmsix, - MIN(IXL_MAX_VECTORS, IF_MAX_VECTORS), + MIN(nqueues, IF_MAX_VECTORS), INTRMAP_POWEROF2); nqueues = intrmap_count(sc->sc_intrmap); KASSERT(nqueues > 0);