From: Jonathan Gray Subject: Re: libc: ansify arch/sparc64 code To: Theo Buehler Cc: tech@openbsd.org Date: Mon, 6 Jul 2026 21:02:02 +1000 On Mon, Jul 06, 2026 at 12:20:36PM +0200, Theo Buehler wrote: > This generates quite a bit of noise with kirill's clang diff. > With this diff, the -Wdeprecated-non-prototype noise in libc > is confined to rpc/ like on the other clang archs. ok jsg@ > > Index: arch/sparc64/fpu/fpu_add.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_add.c,v > diff -u -p -r1.5 fpu_add.c > --- arch/sparc64/fpu/fpu_add.c 29 Mar 2024 21:02:11 -0000 1.5 > +++ arch/sparc64/fpu/fpu_add.c 6 Jul 2026 10:14:05 -0000 > @@ -61,8 +61,7 @@ > #include "fpu_extern.h" > > struct fpn * > -__fpu_add(fe) > - struct fpemu *fe; > +__fpu_add(struct fpemu *fe) > { > struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r; > u_int r0, r1, r2, r3; > Index: arch/sparc64/fpu/fpu_div.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_div.c,v > diff -u -p -r1.5 fpu_div.c > --- arch/sparc64/fpu/fpu_div.c 29 Mar 2024 21:02:11 -0000 1.5 > +++ arch/sparc64/fpu/fpu_div.c 6 Jul 2026 10:14:05 -0000 > @@ -153,8 +153,7 @@ > */ > > struct fpn * > -__fpu_div(fe) > - struct fpemu *fe; > +__fpu_div(struct fpemu *fe) > { > struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; > u_int q, bit; > Index: arch/sparc64/fpu/fpu_explode.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_explode.c,v > diff -u -p -r1.12 fpu_explode.c > --- arch/sparc64/fpu/fpu_explode.c 29 Mar 2024 21:02:11 -0000 1.12 > +++ arch/sparc64/fpu/fpu_explode.c 6 Jul 2026 10:14:05 -0000 > @@ -84,9 +84,7 @@ > * int -> fpn. > */ > int > -__fpu_itof(fp, i) > - struct fpn *fp; > - u_int i; > +__fpu_itof(struct fpn *fp, u_int i) > { > > if (i == 0) > @@ -110,9 +108,7 @@ __fpu_itof(fp, i) > * uint -> fpn. > */ > int > -__fpu_uitof(fp, i) > - struct fpn *fp; > - u_int i; > +__fpu_uitof(struct fpn *fp, u_int i) > { > > if (i == 0) > @@ -136,9 +132,7 @@ __fpu_uitof(fp, i) > * 64-bit int -> fpn. > */ > int > -__fpu_xtof(fp, i) > - struct fpn *fp; > - u_int64_t i; > +__fpu_xtof(struct fpn *fp, u_int64_t i) > { > > if (i == 0) > @@ -163,9 +157,7 @@ __fpu_xtof(fp, i) > * 64-bit uint -> fpn. > */ > int > -__fpu_uxtof(fp, i) > - struct fpn *fp; > - u_int64_t i; > +__fpu_uxtof(struct fpn *fp, u_int64_t i) > { > > if (i == 0) > @@ -225,9 +217,7 @@ __fpu_uxtof(fp, i) > * format: i.e., needs at most fp_mant[0] and fp_mant[1]. > */ > int > -__fpu_stof(fp, i) > - struct fpn *fp; > - u_int i; > +__fpu_stof(struct fpn *fp, u_int i) > { > int exp; > u_int frac, f0, f1; > @@ -245,9 +235,7 @@ __fpu_stof(fp, i) > * We assume this uses at most (96-FP_LG) bits. > */ > int > -__fpu_dtof(fp, i, j) > - struct fpn *fp; > - u_int i, j; > +__fpu_dtof(struct fpn *fp, u_int i, u_int j) > { > int exp; > u_int frac, f0, f1, f2; > @@ -266,9 +254,7 @@ __fpu_dtof(fp, i, j) > * 128-bit extended -> fpn. > */ > int > -__fpu_qtof(fp, i, j, k, l) > - struct fpn *fp; > - u_int i, j, k, l; > +__fpu_qtof(struct fpn *fp, u_int i, u_int j, u_int k, u_int l) > { > int exp; > u_int frac, f0, f1, f2, f3; > @@ -295,10 +281,7 @@ __fpu_qtof(fp, i, j, k, l) > * operations are performed.) > */ > void > -__fpu_explode(fe, fp, type, reg) > - struct fpemu *fe; > - struct fpn *fp; > - int type, reg; > +__fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg) > { > u_int32_t s = 0/* XXX gcc */, *sp; > u_int64_t l[2]; > Index: arch/sparc64/fpu/fpu_implode.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_implode.c,v > diff -u -p -r1.8 fpu_implode.c > --- arch/sparc64/fpu/fpu_implode.c 29 Mar 2024 21:02:11 -0000 1.8 > +++ arch/sparc64/fpu/fpu_implode.c 6 Jul 2026 10:14:05 -0000 > @@ -191,9 +191,7 @@ toinf(struct fpemu *fe, int sign) > * of the SPARC instruction set). > */ > u_int > -__fpu_ftoi(fe, fp) > - struct fpemu *fe; > - struct fpn *fp; > +__fpu_ftoi(struct fpemu *fe, struct fpn *fp) > { > u_int i; > int sign, exp; > @@ -240,10 +238,7 @@ __fpu_ftoi(fe, fp) > * of the SPARC instruction set). > */ > u_int > -__fpu_ftox(fe, fp, res) > - struct fpemu *fe; > - struct fpn *fp; > - u_int *res; > +__fpu_ftox(struct fpemu *fe, struct fpn *fp, u_int *res) > { > u_int64_t i; > int sign, exp; > @@ -292,9 +287,7 @@ __fpu_ftox(fe, fp, res) > * We assume <= 29 bits in a single-precision fraction (1.f part). > */ > u_int > -__fpu_ftos(fe, fp) > - struct fpemu *fe; > - struct fpn *fp; > +__fpu_ftos(struct fpemu *fe, struct fpn *fp) > { > u_int sign = fp->fp_sign << 31; > int exp; > @@ -376,10 +369,7 @@ done: > * This code mimics fpu_ftos; see it for comments. > */ > u_int > -__fpu_ftod(fe, fp, res) > - struct fpemu *fe; > - struct fpn *fp; > - u_int *res; > +__fpu_ftod(struct fpemu *fe, struct fpn *fp, u_int *res) > { > u_int sign = fp->fp_sign << 31; > int exp; > @@ -437,10 +427,7 @@ done: > * so we can avoid a small bit of work. > */ > u_int > -__fpu_ftoq(fe, fp, res) > - struct fpemu *fe; > - struct fpn *fp; > - u_int *res; > +__fpu_ftoq(struct fpemu *fe, struct fpn *fp, u_int *res) > { > u_int sign = fp->fp_sign << 31; > int exp; > @@ -497,11 +484,7 @@ done: > * Implode an fpn, writing the result into the given space. > */ > void > -__fpu_implode(fe, fp, type, space) > - struct fpemu *fe; > - struct fpn *fp; > - int type; > - u_int *space; > +__fpu_implode(struct fpemu *fe, struct fpn *fp, int type, u_int *space) > { > > switch (type) { > Index: arch/sparc64/fpu/fpu_mul.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_mul.c,v > diff -u -p -r1.4 fpu_mul.c > --- arch/sparc64/fpu/fpu_mul.c 29 Mar 2024 21:02:11 -0000 1.4 > +++ arch/sparc64/fpu/fpu_mul.c 6 Jul 2026 10:14:05 -0000 > @@ -100,8 +100,7 @@ > * until we reach a nonzero word. > */ > struct fpn * > -__fpu_mul(fe) > - struct fpemu *fe; > +__fpu_mul(struct fpemu *fe) > { > struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; > u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m; > Index: arch/sparc64/fpu/fpu_sqrt.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_sqrt.c,v > diff -u -p -r1.7 fpu_sqrt.c > --- arch/sparc64/fpu/fpu_sqrt.c 29 Mar 2024 21:02:11 -0000 1.7 > +++ arch/sparc64/fpu/fpu_sqrt.c 6 Jul 2026 10:14:05 -0000 > @@ -187,8 +187,7 @@ > * this, so we have some justification in assuming it. > */ > struct fpn * > -__fpu_sqrt(fe) > - struct fpemu *fe; > +__fpu_sqrt(struct fpemu *fe) > { > struct fpn *x = &fe->fe_f1; > u_int bit, q, tt; > Index: arch/sparc64/gen/fpsetmask.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/gen/fpsetmask.c,v > diff -u -p -r1.1 fpsetmask.c > --- arch/sparc64/gen/fpsetmask.c 29 Aug 2001 01:34:56 -0000 1.1 > +++ arch/sparc64/gen/fpsetmask.c 6 Jul 2026 10:14:05 -0000 > @@ -8,8 +8,7 @@ > #include > > fp_except > -fpsetmask(mask) > - fp_except mask; > +fpsetmask(fp_except mask) > { > fp_except old; > fp_except new; > Index: arch/sparc64/gen/fpsetround.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/gen/fpsetround.c,v > diff -u -p -r1.1 fpsetround.c > --- arch/sparc64/gen/fpsetround.c 29 Aug 2001 01:34:56 -0000 1.1 > +++ arch/sparc64/gen/fpsetround.c 6 Jul 2026 10:14:05 -0000 > @@ -8,8 +8,7 @@ > #include > > fp_rnd > -fpsetround(rnd_dir) > - fp_rnd rnd_dir; > +fpsetround(fp_rnd rnd_dir) > { > fp_rnd old; > fp_rnd new; > Index: arch/sparc64/gen/fpsetsticky.c > =================================================================== > RCS file: /cvs/src/lib/libc/arch/sparc64/gen/fpsetsticky.c,v > diff -u -p -r1.1 fpsetsticky.c > --- arch/sparc64/gen/fpsetsticky.c 29 Aug 2001 01:34:56 -0000 1.1 > +++ arch/sparc64/gen/fpsetsticky.c 6 Jul 2026 10:14:05 -0000 > @@ -8,8 +8,7 @@ > #include > > fp_except > -fpsetsticky(sticky) > - fp_except sticky; > +fpsetsticky(fp_except sticky) > { > fp_except old; > fp_except new; > >