From: Christian Weisgerber Subject: llvm: garbage-collect local changes for now-retired loongson platform To: tech@openbsd.org Cc: Robert Nagy Date: Fri, 17 Jul 2026 01:24:24 +0200 We have been carrying along some local LLVM fix for loongson that can now be dropped. I don't know if this affects the build on other platforms. I have an amd64 build running as I'm writing this ... I'll send a corresponding patch for the various LLVM ports to the ports@ list. ----------------------------------------------- commit 9a3369197ed29821a71987428399efa347f1cde6 (local) from: Christian Weisgerber date: Thu Jul 16 22:52:45 2026 UTC llvm: garbage-collect local changes for now-retired loongson platform diff 7f1f193c4e3ba7d0ff500979246f46d579d07ab9 9a3369197ed29821a71987428399efa347f1cde6 commit - 7f1f193c4e3ba7d0ff500979246f46d579d07ab9 commit + 9a3369197ed29821a71987428399efa347f1cde6 blob - 5473c8b44d627571fff2ab0334e57d1967de307b blob + 9080ee6f6f40d99a46136db32e59f10e46126a61 --- gnu/llvm/clang/include/clang/Options/Options.td +++ gnu/llvm/clang/include/clang/Options/Options.td @@ -5926,8 +5926,6 @@ def mno_check_zero_division : Flag<["-"], "mno-check-z def mfix4300 : Flag<["-"], "mfix4300">, Group; def mcompact_branches_EQ : Joined<["-"], "mcompact-branches=">, Group; -def mfix_loongson2f_btb : Flag<["-"], "mfix-loongson2f-btb">, - Group; } // let Flags = [TargetSpecific] def mbranch_likely : Flag<["-"], "mbranch-likely">, Group, IgnoredGCCCompat; blob - b42224ace5130e998170e93cc53a9e84cf45c6cd blob + f0daf846e05938e9344e561936d0c0c4a7c9ee2b --- gnu/llvm/clang/lib/Driver/ToolChains/Clang.cpp +++ gnu/llvm/clang/lib/Driver/ToolChains/Clang.cpp @@ -2565,11 +2565,6 @@ static void CollectArgsForIntegratedAssembler(Compilat Msa = false; continue; } - if (Value.starts_with("-mfix-loongson2f-btb")) { - CmdArgs.push_back("-mllvm"); - CmdArgs.push_back("-fix-loongson2f-btb"); - continue; - } MipsTargetFeature = llvm::StringSwitch(Value) .Case("-mips1", "+mips1") blob - 653ebfdcccdd4e4547bf41ecaae88d41b07271f7 blob + 6675db755d1a1fb265e753808639c08e03bd2342 --- gnu/llvm/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ gnu/llvm/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -69,7 +69,6 @@ class MCInstrInfo; extern cl::opt EmitJalrReloc; extern cl::opt NoZeroDivCheck; -extern cl::opt FixLoongson2FBTB; namespace { @@ -237,9 +236,6 @@ class MipsAsmParser : public MCTargetAsmParser { bool emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc, MCSymbol *Sym); - bool emitLoongson2FBTBFlush(MCInst &Inst, MipsTargetStreamer &TOut, - SMLoc IDLoc, const MCSubtargetInfo *STI); - bool expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI); @@ -2064,20 +2060,6 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, S Inst = BInst; } - if (FixLoongson2FBTB) { - switch (Inst.getOpcode()) { - case Mips::JALR: - case Mips::JR: - case Mips::JalOneReg: - case Mips::JalTwoReg: - if (emitLoongson2FBTBFlush(Inst, TOut, IDLoc, STI)) - return true; - LLVM_FALLTHROUGH; - default: - break; - } - } - // This expansion is not in a function called by tryExpandInstruction() // because the pseudo-instruction doesn't have a distinct opcode. if ((Opcode == Mips::JAL || Opcode == Mips::JAL_MM) && inPicMode()) { @@ -3377,39 +3359,6 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStrea return false; } -bool MipsAsmParser::emitLoongson2FBTBFlush(MCInst &Inst, - MipsTargetStreamer &TOut, - SMLoc IDLoc, - const MCSubtargetInfo *STI) { - unsigned SReg = Inst.getOperand(0).getReg(); - if (SReg == Mips::ZERO || SReg == Mips::ZERO_64 || - SReg == Mips::K0 || SReg == Mips::K0_64 || - SReg == Mips::K1 || SReg == Mips::K1_64) - return false; - - unsigned ATReg = getATReg(IDLoc); - if (ATReg == 0) - return true; - - // Direct comparison of SReg and ATReg is not reliable because - // the register classes may differ. - unsigned ATRegIndex = AssemblerOptions.back()->getATRegIndex(); - if (ATRegIndex == 0) - return true; - if (SReg == getReg(Mips::GPR32RegClassID, ATRegIndex) || - SReg == getReg(Mips::GPR64RegClassID, ATRegIndex)) - return false; - - warnIfNoMacro(IDLoc); - - // li $at, COP_0_BTB_CLEAR | COP_0_RAS_DISABLE - TOut.emitRRI(Mips::ORi, ATReg, Mips::ZERO, 3, IDLoc, STI); - // dmtc0 $at, COP_0_DIAG - TOut.emitRRI(Mips::DMTC0, Mips::COP022, ATReg, 0, IDLoc, STI); - - return false; -} - static uint64_t convertIntToDoubleImm(uint64_t ImmOp64) { // If ImmOp64 is AsmToken::Integer type (all bits set to zero in the // exponent field), convert it to double (e.g. 1 to 1.0) blob - 74fea2cc7a49e8143e5b430d299856fdccd791ad blob + cb3fe47f0c4af428015dc979f936a37ebb3ea58a --- gnu/llvm/llvm/lib/Target/Mips/CMakeLists.txt +++ gnu/llvm/llvm/lib/Target/Mips/CMakeLists.txt @@ -45,7 +45,6 @@ add_llvm_target(MipsCodeGen MipsISelLowering.cpp MipsFrameLowering.cpp MipsLegalizerInfo.cpp - MipsLoongson2FBTBFix.cpp MipsBranchExpansion.cpp MipsMCInstLower.cpp MipsMachineFunction.cpp blob - 5bc35df1eca082df8db455c254f08382d0c14c96 blob + 59c8e7c72224efb88cba5f8a888a09e719c68e81 --- gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp +++ gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp @@ -25,11 +25,6 @@ cl::opt cl::desc("MIPS: Don't trap on integer division by zero."), cl::init(false)); -cl::opt -FixLoongson2FBTB("fix-loongson2f-btb", cl::Hidden, - cl::desc("MIPS: Enable Loongson 2F BTB workaround"), - cl::init(false)); - namespace { static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3}; blob - ca85b5037f2043b4057666a143dc4ba05c28788f blob + 60d5114f2f55ade72a6a1f12d0999ba1ff125728 --- gnu/llvm/llvm/lib/Target/Mips/Mips.h +++ gnu/llvm/llvm/lib/Target/Mips/Mips.h @@ -41,7 +41,6 @@ class PassRegistry; ModulePass *createMipsOs16Pass(); ModulePass *createMips16HardFloatPass(); -FunctionPass *createMipsLoongson2FBTBFix(); FunctionPass *createMipsModuleISelDagPass(); FunctionPass *createMipsOptimizePICCallPass(); FunctionPass *createMipsDelaySlotFillerPass(); @@ -57,7 +56,6 @@ InstructionSelector * createMipsInstructionSelector(const MipsTargetMachine &, const MipsSubtarget &, const MipsRegisterBankInfo &); -void initializeMipsLoongson2FBTBFixPass(PassRegistry &); void initializeMicroMipsSizeReducePass(PassRegistry &); void initializeMipsAsmPrinterPass(PassRegistry &); void initializeMipsBranchExpansionPass(PassRegistry &); blob - 44fb84a3018cdce028be202aa5395d0a201df966 (mode 644) blob + /dev/null --- gnu/llvm/llvm/lib/Target/Mips/MipsLoongson2FBTBFix.cpp +++ /dev/null @@ -1,91 +0,0 @@ -//===- MipsLoongson2FBTBFix.cpp -------------------------------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#include "Mips.h" -#include "MipsTargetMachine.h" -#include "llvm/CodeGen/MachineFunctionPass.h" -#include "llvm/CodeGen/Passes.h" - -using namespace llvm; - -namespace { - -class MipsLoongson2FBTBFix : public MachineFunctionPass { -public: - static char ID; - - MipsLoongson2FBTBFix() : MachineFunctionPass(ID) { - initializeMipsLoongson2FBTBFixPass(*PassRegistry::getPassRegistry()); - } - - bool runOnMachineFunction(MachineFunction &MF) override; - - StringRef getPassName() const override { - return "Loongson 2F BTB erratum workaround pass"; - } - -private: - bool runOnBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB); -}; - -} // end of anonymous namespace - -char MipsLoongson2FBTBFix::ID = 0; - -INITIALIZE_PASS(MipsLoongson2FBTBFix, "loongson2f-btb-fix-pass", - "Mips Loongson 2F BTB erratum workaround", false, false) - -FunctionPass *llvm::createMipsLoongson2FBTBFix() { - return new MipsLoongson2FBTBFix(); -} - -bool MipsLoongson2FBTBFix::runOnMachineFunction(MachineFunction &MF) { - bool Changed = false; - - for (auto &MBB : MF) { - Changed |= runOnBasicBlock(MF, MBB); - } - return Changed; -} - -bool MipsLoongson2FBTBFix::runOnBasicBlock( - MachineFunction &MF, MachineBasicBlock &MBB) { - MachineRegisterInfo &MRI = MF.getRegInfo(); - const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo(); - bool Changed = false; - - for (auto &MI : MBB) { - if (!MI.isCall() && !MI.isIndirectBranch() && !MI.isReturn()) - continue; - - // Skip calls that are not through a register. - if (MI.isCall()) { - if (MI.getNumOperands() == 0) - continue; - const MachineOperand &MO = MI.getOperand(0); - if (!MO.isReg()) - continue; - } - - Changed = true; - - DebugLoc MBBDL = MI.getDebugLoc(); - Register TempReg = MRI.createVirtualRegister(&Mips::GPR64RegClass); - - // li $TempReg, COP_0_BTB_CLEAR | COP_0_RAS_DISABLE - BuildMI(MBB, MI, MBBDL, TII->get(Mips::ORi), TempReg) - .addReg(Mips::ZERO) - .addImm(3); - // dmtc0 $TempReg, COP_0_DIAG - BuildMI(MBB, MI, MBBDL, TII->get(Mips::DMTC0)) - .addReg(Mips::COP022) - .addReg(TempReg) - .addImm(0); - } - return Changed; -} blob - fe8cf21ff9183a4528f05906d3c36091586adf20 blob + 03bedc5b15c4ff81cb6c7c4500f93a27e6f72988 --- gnu/llvm/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ gnu/llvm/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -48,7 +48,6 @@ using namespace llvm; #define DEBUG_TYPE "mips" -extern cl::opt FixLoongson2FBTB; static cl::opt EnableMulMulFix("mfix4300", cl::init(false), cl::desc("Enable the VR4300 mulmul bug fix."), cl::Hidden); @@ -254,9 +253,6 @@ bool MipsPassConfig::addInstSelector() { void MipsPassConfig::addPreRegAlloc() { addPass(createMipsOptimizePICCallPass()); - - if (FixLoongson2FBTB) - addPass(createMipsLoongson2FBTBFix()); } TargetTransformInfo -- Christian "naddy" Weisgerber naddy@mips.inka.de