From: Brad Smith <brad@comstyle.com>
Subject: mips64: Fix compiler-rt __clear_cache()
To: tech@openbsd.org
Date: Sun, 20 Sep 2026 16:48:06 -0400

Due to a commit that went in with LLVM/compiler-rt 16 __clear_cache() has
been broken on OpenBSD/mips64.

https://github.com/llvm/llvm-project/commit/674a17e9bbe82e8c53952fd94dcd862b17cb2d2f


- [Mips] Restrict rdhwr+synci to Linux on MIPS R6


Index: clear_cache.c
===================================================================
RCS file: /cvs/src/gnu/llvm/compiler-rt/lib/builtins/clear_cache.c,v
retrieving revision 1.7
diff -u -p -u -p -r1.7 clear_cache.c
--- clear_cache.c	21 Aug 2025 10:38:51 -0000	1.7
+++ clear_cache.c	11 Sep 2026 04:32:27 -0000
@@ -96,10 +96,10 @@ void __clear_cache(void *start, void *en
 #elif defined(__mips__)
   const uintptr_t start_int = (uintptr_t)start;
   const uintptr_t end_int = (uintptr_t)end;
+#if __mips_isa_rev >= 6 && defined(__linux__)
   uintptr_t synci_step;
   __asm__ volatile("rdhwr %0, $1" : "=r"(synci_step));
   if (synci_step != 0) {
-#if __mips_isa_rev >= 6
     for (uintptr_t p = start_int; p < end_int; p += synci_step)
       __asm__ volatile("synci 0(%0)" : : "r"(p));
 
@@ -110,6 +110,7 @@ void __clear_cache(void *start, void *en
                      "jr.hb $at\n"
                      "move $at, $0\n"
                      ".set at");
+  }
 #elif defined(__linux__) || defined(__OpenBSD__)
     // Pre-R6 may not be globalized. And some implementations may give strange
     // synci_step. So, let's use libc call for it.
@@ -119,7 +120,6 @@ void __clear_cache(void *start, void *en
     (void)end_int;
     compilerrt_abort();
 #endif
-  }
 #elif defined(__aarch64__) && !defined(__APPLE__)
   uint64_t xstart = (uint64_t)(uintptr_t)start;
   uint64_t xend = (uint64_t)(uintptr_t)end;