On Thu, Mar 28, 2024 at 11:13 AM Colin Didier <cdidier@cybione.org> wrote:

> fixes accessing eMMC on MeLE Quieter 4C.
>
> before:
> sdhc0 at pci0 dev 26 function 0 "Intel ADL-N eMMC" rev 0x00: apic 2 int 16
> sdhc0: SDHC 3.00, 200 MHz base clock
> sdmmc0 at sdhc0: 8-bit, sd high-speed, mmc high-speed, ddr52, dma
> sdmmc0: can't enable card
>
> after:
> sdhc0 at pci0 dev 26 function 0 "Intel ADL-N eMMC" rev 0x00: apic 2 int 16
> sdhc0: SDHC 3.00, 200 MHz base clock
> sdmmc0 at sdhc0: 8-bit, sd high-speed, mmc high-speed, ddr52, dma
> scsibus1 at sdmmc0: 2 targets, initiator 0
> sd0 at scsibus1 targ 1 lun 0: <SD/MMC, A3A562, 0000> removable
> sd0: 118000MB, 512 bytes/sector, 241664000 sectors
>
> Index: sys/dev/pci/sdhc_pci.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/sdhc_pci.c,v
> retrieving revision 1.24
> diff -u -p -u -p -r1.24 sdhc_pci.c
> --- sys/dev/pci/sdhc_pci.c      11 Mar 2022 18:00:51 -0000      1.24
> +++ sys/dev/pci/sdhc_pci.c      28 Mar 2024 01:54:59 -0000
> @@ -131,7 +131,8 @@ sdhc_pci_attach(struct device *parent, s
>            (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_100SERIES_LP_EMMC
> ||
>            PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_APOLLOLAKE_EMMC ||
>            PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_GLK_EMMC ||
> -          PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_JSL_EMMC))
> +          PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_JSL_EMMC ||
> +          PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_ADL_N_EMMC))
>                 sc->sc.sc_flags |= SDHC_F_NOPWR0;
>
>         /* Some RICOH controllers need to be bumped into the right mode. */
>
>

Is there any real device working without the NOPWR0 flag ?

sdhc0 at pci0 dev 26 function 0 "Intel Elkhart Lake eMMC" rev 0x11: apic 2
int 16
sdhc0: SDHC 3.00, 200 MHz base clock
sdmmc0 at sdhc0: 8-bit, sd high-speed, mmc high-speed, ddr52, dma
sdmmc0: can't enable card
sdhc0 at pci0 dev 26 function 0 "Intel Elkhart Lake eMMC" rev 0x11: apic 2
int 16
sdhc0: SDHC 3.00, 200 MHz base clock
sdmmc0 at sdhc0: 8-bit, sd high-speed, mmc high-speed, ddr52, dma
scsibus2 at sdmmc0: 2 targets, initiator 0

Are those devices working with it ?


Index: sys/dev/pci/sdhc_pci.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/sdhc_pci.c,v
diff -u -p -r1.24 sdhc_pci.c
--- sys/dev/pci/sdhc_pci.c      11 Mar 2022 18:00:51 -0000      1.24
+++ sys/dev/pci/sdhc_pci.c      28 Mar 2024 16:27:43 -0000
@@ -127,12 +127,17 @@ sdhc_pci_attach(struct device *parent, s
                sc->sc.sc_flags |= SDHC_F_NOPWR0;

        /* Some Intel controllers break if set to 0V bus power. */
+        /*
        if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL &&
            (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_100SERIES_LP_EMMC
||
            PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_APOLLOLAKE_EMMC ||
            PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_GLK_EMMC ||
-           PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_JSL_EMMC))
+           PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_JSL_EMMC ||
+           PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_JSL_EMMC ||
+           PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_ADL_N_EMMC ))
                sc->sc.sc_flags |= SDHC_F_NOPWR0;
+        */
+       sc->sc.sc_flags |= SDHC_F_NOPWR0;

        /* Some RICOH controllers need to be bumped into the right mode. */
        if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RICOH &&


All diff in this thread are tab malged, and my diff is informative

Thank you Colin Didier for the pointer !

Attachment got tab for patching and add EHL /  Elkhart Lake

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