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Alder Lake eMMC needs the same 0V quirk as Jasper/Apollo/Gemini Lake
Alder Lake eMMC needs the same 0V quirk as Jasper/Apollo/Gemini Lake
Alder Lake eMMC needs the same 0V quirk as Jasper/Apollo/Gemini Lake
Alder Lake eMMC needs the same 0V quirk as Jasper/Apollo/Gemini Lake
On Thu, Mar 28, 2024 at 7:52 PM Jonathan Gray <jsg@jsg.id.au> wrote: > On Thu, Mar 28, 2024 at 12:34:17PM -0400, Sven F. wrote: > > > > Attachment got tab for patching and add EHL / Elkhart Lake > > Send patches inline, not as attachments. > > Which system do you see this on? > > updated diff, ids roughly in order of hardware release > > Index: sys/dev/pci/sdhc_pci.c > =================================================================== > RCS file: /cvs/src/sys/dev/pci/sdhc_pci.c,v > diff -u -p -r1.25 sdhc_pci.c > --- sys/dev/pci/sdhc_pci.c 28 Mar 2024 23:38:54 -0000 1.25 > +++ sys/dev/pci/sdhc_pci.c 28 Mar 2024 23:45:27 -0000 > @@ -132,6 +132,7 @@ sdhc_pci_attach(struct device *parent, s > PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_APOLLOLAKE_EMMC || > PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_GLK_EMMC || > PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_JSL_EMMC || > + PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_EHL_EMMC || > PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_ADL_N_EMMC)) > sc->sc.sc_flags |= SDHC_F_NOPWR0; > > @OK That one : efi0: American Megatrends rev 0x50013 cpu0: Intel(R) Celeron(R) J6413 @ 1.80GHz, 1796.12 MHz, 06-96-01, patch 00000017 pchb0 at pci0 dev 0 function 0 "Intel Elkhart Lake Host" rev 0x01 inteldrm0: msi, ELKHARTLAKE, gen 11 sdhc0 at pci0 dev 26 function 0 "Intel Elkhart Lake eMMC" rev 0x11: apic 2 int 16
Alder Lake eMMC needs the same 0V quirk as Jasper/Apollo/Gemini Lake
Alder Lake eMMC needs the same 0V quirk as Jasper/Apollo/Gemini Lake
Alder Lake eMMC needs the same 0V quirk as Jasper/Apollo/Gemini Lake
Alder Lake eMMC needs the same 0V quirk as Jasper/Apollo/Gemini Lake