On Fri, Jul 19, 2024 at 04:39:04PM +0200, Mark Kettenis wrote:
> > Date: Wed, 17 Jul 2024 16:58:50 +0200
> > From: Mark Kettenis <mark.kettenis@xs4all.nl>
> > 
> > > Date: Tue, 16 Jul 2024 22:10:26 +0200
> > > From: Christian Weisgerber <naddy@mips.inka.de>
> > > 
> > > The patch below populates arm64 hwcaps from the ID_AA64ISAR0 register.
> > > 
> > > I didn't look at other registers and I don't know if we want to do
> > > it this way.  There is the question of keeping this in sync with
> > > the CPU_ID_AA64* sysctl() for filtering out unsupported options.
> > > 
> > > It's intended as a provisional change to signal the common AES,
> > > SHA, CRC32 instruction extensions via elf_aux_info(), so people can
> > > check how that interacts with ports.
> > 
> > Sorry, but I discussed with jca@ that we (I) would tackle this after
> > my diff goes in that adds emulation of the ID registers as that
> > reorganizes how thie cpi_id_aa64xxx registers are sanitized.
> > 
> > We want to set the hwcap flags at that point instead of in
> > cpu_identify().
> 
> So here is a diff.  That provides that populates hwcap and hwcap2 in a
> way that is consistent with what the sysctls and emulated ID
> instructions provide.
> 
> Note that this assumes the patch that enables emulated ID instructions
> has gone in.  Until that happens, either drop trhe setting of
> HWCAP_CPUID or apply that patch first (and make sure you don't boot
> into a snapshot kernel).
> 
> I'd like to move forward with both patches such that we can catch any
> fallout early.
> 
> ok?

Matches what https://docs.kernel.org/arch/arm64/elf_hwcaps.html says.
ok jca@

I'll be looking at the cpuid bits next.

-- 
jca