> Date: Mon, 21 Oct 2024 18:33:45 +0000
> From: Miod Vallat <miod@online.fr>
> 
> > Looks like amd64 is the only architecture that does that guardpage
> > thing.  So I think this is fine.
> 
> On that topic, it would be nice for at least all 64-bit arches with
> USPACE_ALIGN = 0, to always allocate UPAGES + 1 contiguous virtual pages
> for the u area, UPAGES physical pages, and make the lowest page's
> virtual address transation invalid.
> 
> This has been on my todo list for a very long time, but
> ENOTENOUGHSPARETIME as usual. Maybe once I'm retired...

Should we do that as MI code with:

#if defined(__LP64__) && USPACE_ALIGN == 0

?